ISL28117, ISL28217, ISL28417
22
November 30, 2012
FN6632.10
.
FIGURE 56. SPICE SCHEMATIC
V
IN
-
V
OUT
V+
V-
+
-
+
-
+
-
+
-
+
-
D12
R17
290
IOS
0.3nA
R1
5E11
R2
5E11
DN
0.1V
V5
In+
Vin-
VCM
SUPERB
Q1 Q2
SUPERB
CASCODE
CASCODE
Q4
Q5
R3
4.45k
R4
4.45k
IEE1
96E-6
D1
DX
Mirror
Q3
IEE
200E-6
1
2
3
4
5
6
V++
+
-
+
-
V
IN
+
24
25
4
5
V++
Vc
Vmid
V--
VCM
+
-
VOS
13E-6
+
-
+
-
D2
DX
D3
DX
V1
1.86V
V2
1.86V
G1
G2
R5
1
R6
1
4
5
V++
11
12
10
+
-
+
-
+
-
+
-
D4
DX
D5
DX
V3
1.86V
V4
1.86V
G3
G4
R7
1.99e10
R8
Vg
14
13
C2
400pF
C3
R9
2.1E3
R10
2.1E3
400pF
1.99e10
Vmid
Vmid
+
-
+
-
G5
G6
R11
1
R12
18
17
L1
15.9159E
L2
15.9159E
1
VCM
EOS
+
-
+
-
ISY
0.44mA
V++
V-
V+
+
-
+
-
G7
G8
R15
90
R16
22
23
90
V--
VCM
Vc
+
-
+
-
D10
DY
D11
DY
D8
DX
D9
DX
D6
DX
D7
DX
Vg
V++
V--
V--
+
-
+
-
V5
V6
1.12V
1.12V
Vg
+
-
+
-
Vc
G10
G9
VOUT
20
21
8
9
7
En
Voltage Noise
Input Stage
1
ST
Gain Stage
Mid Supply Ref
2
nd
Gain Stage
Common Mode Gain Stage
Supply Isolation Stage
E2
E3
Output Stage
C6
1.2pF
C4
2pF
C5
2pF
