Intersil ISL28113 User Manual Download Page 15

ISL28113, ISL28213, ISL28413

15

FN6728.5

June 9, 2011

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to Web to make sure you
have the latest Rev.

DATE

REVISION

CHANGE

5/18/11

FN6728.5

- On page 2, Ordering Information table: ISL28113FHZ-T7 & -T7A PKG DWG # changed from MDP0038  (Obsoleted)  to 
P5.064A. Removed ISL28213FHZ and added “Coming Soon” to parts ISL28213FHZ-T7A and ISL28413TSSOPEVAL1Z.
- On page 3, Pin Descriptions: Circuit 3 diagram, removed anti-parallel diodes from the IN+ to IN- terminals.
- On page 4, Absolute Maximum Ratings: changed Differential Input Voltage from "0.5V" to "V

-

 - 0.5V to V

+

 + 0.5V".

- On page 4, updated CMRR and PSRR parameters in Electrical Specifications table with test condition specifiying -40°C 
to 125°C typical parameter.
- On page 5, updated Note 6 (“over-temp” note) referenced in MIN and MAX column headings of Electrical Specifications 
table from "Parameters with MIN and/or  MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature 
limits established by characterization and are not production tested." to new standard "Compliance to datasheet limits is 
assured by one or more methods: production test, characterization  and/or design."
- On page 9, under “Input ESD Diode Protection,” removed “They also contain back to-back diodes across the input 
terminals.” Changed “For applications where the input differential voltage is expected to exceed 0.5V, an external series 
resistor...” to “For applications where the input differential voltage may exceed either power supply voltage by 0.5V or 
more, an external series resistor...”. Removed “Although the amplifier is fully protected, high input slew rates that exceed 
the amplifier slew rate (±1V/µs) may cause output distortion.”
- On page 9, Figure 19: updated circuit schematic by removing back-to-back input protection diodes.
- On page 18, replaced Package Outline Drawing MDP0038 (obsolete) with P5.064A.

3/23/10

FN6728.4

Page 1, 2nd paragraph - Added “...SOT23-8 packages...” and changed “SO8” to “SOIC8”.
Also global, changed S08 to SOIC8
Pg 2, Ordering Information table: Part # ISL28213FEZ changed to ISL28213FHZ and Part Marking changed to "TBD" 
-Added Related Literature on page 1, updated ordering information by adding Eval boards.
-Added to ordering information part number ISL28213FHZ 8 Ld SOT-23 Package as coming soon.
-Replaced Figure 24 Simulated Input Noise Voltage with following changes:
Y-axis from “10 to 100” to “10,000 to 10” 
Removed (A) AC sims.dat (active) from top of graph
Curve changed to improve noise performance 
Made changes to Spice Net List as follows:
-Changed Revision from “C” to “D” and added improved noise performance to Revision line.
-Changed in Voltage Noise
“V_V9 29 0 .00035” to “V_V9 29 0 0.45”
“R_R21         28 0 800E3 TC=0,0” to “R_R21         28 0 30”
-Removed TC=0 in Input Stage from R_R1 through C_Cin2
-Removed TC=0 in 1st Gain Stage from R_R9 through R_R12
-Removed TC=0 in 2nd Gain Stage from R_R13 through C_C3
-Changed in Common Mode Gain Stage with Zero 
“G_G5         V++ VC VCM VMID 2.5118E-10” to “G_G5         V++ VC VCM VMID 0.25118”
“G_G6         V-- VC VCM VMID 2.5118E-10” to “G_G6         V-- VC VCM VMID 0.25118”
Removed TC=0 from R_R16 through R_R23
-Changed in Pole Stage
“G_G7         V++ 23 VG VMID 188.49e-6” to ‘G_G7         V++ 23 VG VMID 0.18849”
“G_G8         V-- 23 VG VMID 188.49e-6” to “G_G8         V-- 23 VG VMID 0.18849”
Removed TC=0 from R_R17 through C_C5
Removed TC=0 in Output Stage with Correction Current Sources from R_R19 and R_R20
Made changes to Spice Schematic Figure 21 as follows:
-Input Stage - Modified connection to the EOS (voltage control voltage source)
-Added to Thermal Information 8 LD SOT-23 as TBD
-Added to pin configuration for the ISL28213 8 Ld SOT-23

12/16/09

FN6728.3

Removed “Coming Soon” from MSOP package options in the “Ordering Information” on page 2.
Updated the Theta JA for the MSOP package option from 170°C/W to 180°C/W on page 4.

11/17/09

FN6728.2

Removed “Coming Soon” from SC70 and SOT-23 package options in the “Ordering Information” on page 2.

11/12/09

FN6728.1

Changed theta Ja to 250 from 300.

 

Added license statement (page 10) and reference in spice model (page 12).

10/26/09

FN6728.0

Initial Release

Summary of Contents for ISL28113

Page 1: ...range of applications The ISL28113 is available in the SC70 5 and SOT23 5 packages the ISL28213 is in the MSOP8 SOIC8 SOT23 8 packages and the ISL28413 is in the TSSOP14 SOIC14 packages All devices operate over the extended temperature range of 40 C to 125 C Related Literature See AN1519 for ISL28213 14SOICEVAL2Z Evaluation Board User s Guide See AN1520 for ISL28113 14SOT23EVAL1Z Evaluation Board ...

Page 2: ...SL28413FBZ T13 Note 1 28413 FBZ 14 Ld SOIC MDP0027 ISL28113SOT23EVAL1Z Evaluation Board ISL28213MSOPEVAL2Z Evaluation Board ISL28213SOICEVAL2Z Evaluation Board Coming Soon ISL28413TSSOPEVAL1Z Evaluation Board NOTES 1 Please refer to TB347 for details on reel specifications 2 These Intersil Pb free plastic packaged products employ special Pb free material sets molding compounds die attach materials...

Page 3: ...PIN NAME PIN NUMBER DESCRIPTION 5 LD SC 70 5 LD SOT 23 8 LD MSOP 8 LD SOIC 8 LD SOT 23 14 LD TSSOP 14 LD SOIC OUT OUT_A OUT_B OUT_C OUT_D 4 1 1 7 1 7 8 14 Output CIRCUIT 1 VS 2 2 4 11 Negative supply voltage CIRCUIT 2 IN IN _A IN _B IN _C IN _D 1 3 3 5 3 5 10 12 Positive Input CIRCUIT 3 IN IN _A IN _B IN _C IN _D 3 4 2 6 2 6 9 13 Negative Input VS 5 5 8 4 Positive supply voltage See CIRCUIT 2 V V ...

Page 4: ...ersely impact product reliability and result in failures not covered by warranty NOTES 4 θJA is measured with the component mounted on a high effective thermal conductivity test board in free air See Tech Brief TB379 for details 5 For θJC the case temp location is the top of the package Electrical Specifications VS 5V VS 0V RL Open VCM VS 2 TA 25 C unless otherwise specified Boldface limits apply ...

Page 5: ...apacitance VS 2 5V f 1MHz 1 0 pF Common Mode Input Capacitance 1 3 pF TRANSIENT RESPONSE SR Slew Rate 20 to 80 VOUT VOUT 0 5V to 4 5V 1 V µs tr tf Small Signal Rise Time tr 10 to 90 VS 2 5V AV 1 VOUT 0 05VP P RF 0Ω RL 10kΩ CL 15pF 100 ns Fall Time tf 10 to 90 115 ns ts Settling Time to 0 1 4VP P Step VS 2 5V AV 1 RF 0Ω RL 10kΩ CL 1 2pF 7 5 µs NOTE 6 Compliance to datasheet limits is assured by one...

Page 6: ... FREQUENCY Hz 10 100 1000 INPUT NOISE VOLTAGE nV Hz 1 10 100 1k 10k 100k V 2 5V AV 1 10 000 80 60 40 20 0 20 40 60 80 100 120 0 1 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY Hz OPEN LOOP GAIN dB 180 160 140 120 100 80 60 40 20 0 20 PHASE RL 100k SIMULATION CL 10pF PHASE GAIN V 0 9V 80 60 40 20 0 20 40 60 80 100 120 0 1 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY Hz OPEN LOOP GAIN dB 180 160 140 120 ...

Page 7: ...ZED GAIN dB FREQUENCY Hz 9 8 7 6 5 4 3 2 1 0 1 100 1k 10k 100k 1M 10M VS 2 5V AV 1 RL 10k CL 4pF VOUT 1VP P VOUT 100mVP P VOUT 50mVP P VOUT 10mVP P VOUT 500mVP P VOUT 200mVP P NORMALIZED GAIN dB FREQUENCY Hz 9 8 7 6 5 4 3 2 1 0 1 100 1k 10k 100k 1M 10M V 2 5V AV 1 VOUT 50mVP P CL 4pF RL 49 9k RL 1k RL 499 RL 100 RL 10k RL 4 99k NORMALIZED GAIN dB FREQUENCY Hz 100k 1M 10M 10k 1k 4 3 2 1 0 1 2 3 4 5...

Page 8: ...00 1000 1200 1400 1600 1800 2000 RL 10k AV 1 CL 15pF VOUT 50mVP P VS 2 5V 3 2 1 0 1 2 3 0 2 4 6 8 10 12 14 16 18 20 TIME ms LARGE SIGNAL V RL 10k AV 1 CL 15pF VOUT RAIL VS 0 9V VS 2 5V 0 1 2 3 4 5 6 7 8 9 10 TIME ms INPUT V OUTPUT V 0 6 0 5 0 4 0 3 0 2 0 1 0 0 1 3 0 2 5 2 0 1 5 1 0 0 5 0 0 5 INPUT RL INF AV 10 CL 15pF Rf 9 09k Rg 1k OUTPUT VS 0 9V OUTPUT VS 2 5V 0 1 0 0 1 0 2 0 3 0 4 0 5 0 6 0 1 2...

Page 9: ...exceed the 125 C maximum junction temperatures under certain load power supply conditions and ambient temperature conditions It is therefore important to calculate the maximum junction temperature TJMAX for all applications to determine if power supply voltages load conditions or package type need to be modified to remain in the safe operating area These parameters are related using Equation 1 whe...

Page 10: ...oan rent or license the macro model in whole in part or in modified form to anyone outside the Licensee s company The Licensee may modify the macro model to suit his her specific applications and the Licensee may make copies of this macro model for use within their company only This macro model is provided AS IS WHERE IS AND WITH NO WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED INCLUDING BUY NO...

Page 11: ...G6 R15 1E6 R16 22 21 L1 4 5474 L2 4 5474 1E6 VCM ISY 90uA V V V G11 G12 R19 50 R20 26 27 50 V VCM Vc D11 DY D12 DY D9 DX D10 DX D7 DX D8 DX Vg V V V V7 V8 0 08V 0 08V Vg Vc G10 G9 VOUT 24 25 1ST Gain Stage Cont Mid Supply Ref 2nd Gain Stage Common Mode Gain Stage Supply Isolation Stage E2 E3 Output Stage C4 10pF C3 10pF R17 5305 32 R18 5305 32 23 G8 G7 Vmid Vmid 0 604V 318 329E3 318 329E3 E4 Pole ...

Page 12: ... 15 VMID 334 753e 3 G_G2 V 16 15 VMID 334 753e 3 V_V3 17 16 61 V_V4 16 18 61 D_D1 15 VMID DX D_D2 VMID 15 DX D_D3 17 V DX D_D4 V 18 DX R_R9 15 14 100 R_R10 15 VMID 1e9 R_R11 16 V 1 R_R12 V 16 1 2nd Gain Stage G_G3 V VG 16 VMID 24 893e 3 G_G4 V VG 16 VMID 24 893e 3 V_V5 19 VG 604 V_V6 VG 20 604 D_D5 19 V DX D_D6 V 20 DX R_R13 VG V 318 329e3 R_R14 V VG 318 329e3 C_C2 VG V 5E 09 C_C3 V VG 5E 09 Mid s...

Page 13: ...SE VOLTAGE nV Hz 1 10 100 1k 10k 100k V 2 5V AV 1 10 000 FREQUENCY Hz 1 10 100 1k 10k 100k 10 100 1000 10 000 INPUT NOISE VOLTAGE nV Hz FREQUENCY Hz GAIN dB 100k 1M 10M 10 10k 1k 100 70 10 0 10 20 30 40 50 60 100M V 2 5V VOUT 50mVP P CL 4pF RL 10k AV 1 AV 100 AV 1000 AV 10 Rg 100 Rf 100k Rg 10k Rf 100k Rg 1k Rf 100k Rg OPEN Rf 0 GAIN dB A AC sims dat active FREQUENCY Hz 10 100 1 0k 10k 100k 1 0M 1...

Page 14: ...40 60 80 100 120 0 1 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY Hz OPEN LOOP GAIN dB 180 160 140 120 100 80 60 40 20 0 20 PHASE RL 100k SIMULATION CL 10pF PHASE GAIN V 2 5V OPEN LOOP GAIN dB PHASE A AC sims dat active FREQUENCY Hz 0 01 0 1 10 100 1 0k 10k 100k 1 0M 10M 100M 0 40 80 120 160 200 1 0 0 10 20 30 40 50 60 70 80 0 01 0 1 1 10 100 1k 10k 100k 1M 10M 100M FREQUENCY Hz CMRR dB SIMULATION C...

Page 15: ...3 10 FN6728 4 Page 1 2nd paragraph Added SOT23 8 packages and changed SO8 to SOIC8 Also global changed S08 to SOIC8 Pg 2 Ordering Information table Part ISL28213FEZ changed to ISL28213FHZ and Part Marking changed to TBD Added Related Literature on page 1 updated ordering information by adding Eval boards Added to ordering information part number ISL28213FHZ 8 Ld SOT 23 Package as coming soon Repla...

Page 16: ...nt or patent rights of Intersil or its subsidiaries For information regarding Intersil Corporation and its products see www intersil com FN6728 5 June 9 2011 For additional products see www intersil com product_tree Products Intersil Corporation is a leader in the design and manufacture of high performance analog semiconductors The Company s products address some of the industry s fastest growing ...

Page 17: ...25 c 0 003 0 009 0 08 0 22 6 c1 0 003 0 009 0 08 0 20 6 D 0 073 0 085 1 85 2 15 3 E 0 071 0 094 1 80 2 40 E1 0 045 0 053 1 15 1 35 3 e 0 0256 Ref 0 65 Ref e1 0 0512 Ref 1 30 Ref L 0 010 0 018 0 26 0 46 4 L1 0 017 Ref 0 420 Ref L2 0 006 BSC 0 15 BSC α 0o 8o 0o 8o N 5 5 5 R 0 004 0 10 R1 0 004 0 010 0 15 0 25 Rev 3 7 07 NOTES 1 Dimensioning and tolerances per ASME Y14 5M 1994 2 Package conforms to E...

Page 18: ...ference to guage plane Dimensions in for Reference Only Dimensioning and tolerancing conform to ASME Y14 5M 1994 6 3 5 4 2 Dimensions are in millimeters 1 NOTES DETAIL X SIDE VIEW TYPICAL RECOMMENDED LAND PATTERN TOP VIEW INDEX AREA PIN 1 SEATING PLANE GAUGE 0 45 0 1 2 PLCS 10 TYP 4 1 90 0 40 0 05 2 90 0 95 1 60 2 80 0 05 0 15 1 14 0 15 0 20 C A B D M 1 20 0 60 0 95 2 40 0 10 C 0 08 0 20 SEE DETAI...

Page 19: ...ic interlead protrusions of 0 25mm max per side are not Dimensioning and tolerancing conform to JEDEC MO 187 AA 6 3 5 4 2 Dimensions are in millimeters 1 NOTES DETAIL X SIDE VIEW 1 TYPICAL RECOMMENDED LAND PATTERN TOP VIEW SIDE VIEW 2 included included GAUGE PLANE 3 3 0 25 CA B B 0 10 C 0 08 C A B A 0 25 0 55 0 15 0 95 BSC 0 18 0 05 1 10 Max C H 4 40 3 00 5 80 0 65 3 0 0 1 4 9 0 15 1 40 0 40 0 65 ...

Page 20: ... Dimension does not include interlead flash or protrusions Dimensions in for Reference Only Dimensioning and tolerancing conform to AMSE Y14 5m 1994 3 5 4 2 Dimensions are in millimeters 1 NOTES DETAIL A SIDE VIEW A TYPICAL RECOMMENDED LAND PATTERN TOP VIEW A B 4 4 0 25 A M C B C 0 10 C 5 ID MARK PIN NO 1 0 35 x 45 SEATING PLANE GAUGE PLANE 0 25 5 40 1 50 4 90 0 10 3 90 0 10 1 27 0 43 0 076 0 63 0...

Page 21: ... 017 0 017 0 017 0 017 0 017 0 017 0 003 c 0 009 0 009 0 009 0 011 0 011 0 011 0 011 0 001 D 0 193 0 341 0 390 0 406 0 504 0 606 0 704 0 004 1 3 E 0 236 0 236 0 236 0 406 0 406 0 406 0 406 0 008 E1 0 154 0 154 0 154 0 295 0 295 0 295 0 295 0 004 2 3 e 0 050 0 050 0 050 0 050 0 050 0 050 0 050 Basic L 0 025 0 025 0 025 0 030 0 030 0 030 0 030 0 009 L1 0 041 0 041 0 041 0 056 0 056 0 056 0 056 Basic...

Page 22: ...0 90 0 90 0 90 0 90 0 90 0 05 b 0 25 0 25 0 25 0 25 0 25 0 05 0 06 c 0 15 0 15 0 15 0 15 0 15 0 05 0 06 D 5 00 5 00 6 50 7 80 9 70 0 10 E 6 40 6 40 6 40 6 40 6 40 Basic E1 4 40 4 40 4 40 4 40 4 40 0 10 e 0 65 0 65 0 65 0 65 0 65 Basic L 0 60 0 60 0 60 0 60 0 60 0 15 L1 1 00 1 00 1 00 1 00 1 00 Reference Rev F 2 07 NOTES 1 Dimension D does not include mold flash protrusions or gate burrs Mold flash...

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