Intel TE430VX Technical Product Specification Download Page 38

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TE430VX MotherboardMotherboard Technical Product Specification

Table 7.

I/O Map (continued)

Address (hex)

Size

Description

0080 - 008F

16 bytes

PIIX3 - DMA Page Register

0094-009F

12 bytes

PIIX3 - DMA Page Register

00A0 - 00A1

2 bytes

PIIX3 - Interrupt Controller 2

00C0 - 00DE

31 bytes

PIIX3 - DMA 2

00EA - 00EB

2 bytes

Motherboard Resources

00F0 - 00FF

16 byte

Numeric Data Processor

0170 - 0177

8 bytes

Secondary IDE Channel

01F0 - 01F7

8 bytes

Primary IDE Channel

0200 - 0207

8 bytes

Gameport Joystick

0220 - 022F

16 bytes

Audio - Vibra 16 Base (default)

0270 - 0273

4 bytes

I/O read port for Plug and Play

02F8 - 02FF

8 bytes

On-Board Serial Port 2

0330 - 0331

2 bytes

Audio - MUP-401

0376

1 byte

Sec IDE Chan Cmd Port

0378 - 037B

4 bytes

Parallel Port 1

0388 - 038B

4 bytes

Audio - FM Synthesis

03B0 - 03BB

4 bytes

S3 Trio64 V+

03C0 - 03DF

16 bytes

S3 Trio64 V+

03F0 - 03F5

6 bytes

Floppy Channel 1

03F6

1 byte

Pri IDE Chan Cmd Port

03F7 (Write)

1 byte

Floppy Chan 1 Cmd

03F7, bit 7

1 bit

Floppy Disk Chg Chan 1

03F7, bits 6:0

7 bits

Pri IDE Chan Status Port

03F8 - 03FF

8 bytes

On-Board Serial Port 1

04D0 - 04D1

2 bytes

Edge/level triggered

LPT + 400h

8 bytes

ECP port, LPT + 400h

0CF8 - 0CFB*

4 bytes

PCI Config Address Reg.

0CF9

1 byte

Turbo & Reset Control Reg.

0CFC-0CFF*

4 bytes

PCI Config Data Reg

FF00 - FF07

8 bytes

IDE Bus Master Reg.

FFA0 - FFA7

8 bytes

Primary Bus Master IDE Registers

FFA8 - FFAF

8 bytes

Secondary Bus Master IDE Registers

Only by DWORD accesses.

Summary of Contents for TE430VX

Page 1: ...TE430VX Motherboard Technical Product Specification Order Number 281817 003 May 1996 ...

Page 2: ... assumes no liability whatsoever and Intel disclaims any express or implied warranty relating to sale and or use of Intel products including liability or warranties relating to fitness for a particular purpose merchantability or infringement of any patent copyright or other intellectual property right Intel products are not intended for use in medical life saving or life sustaining applications In...

Page 3: ... Ultra I O Interface Controller SMC FDC37C93FR 13 1 7 1 Floppy controller 13 1 7 2 Keyboard and mouse interface 13 1 7 3 Real time clock CMOS RAM and battery 13 1 7 4 IrDA infra red support 14 1 7 5 Consumer IR Support 14 1 7 6 Parallel port 14 1 8 Graphics Subsystem S3 Trio64V 14 1 8 1 Resolutions supported 15 1 8 2 Graphics Drivers and Utilities 15 1 9 Audio Subsystem Creative Labs Vibra 16C 15 ...

Page 4: ...ion Connectors 27 1 11 Jumper Settings 28 1 11 1 CPU Configuration J9C1 C D 29 1 11 2 Clear CMOS J9C1 A Pins 4 5 6 29 1 11 3 Password clear J9C1 A Pins 1 2 3 29 1 11 4 CMOS Setup Access J9C1 B Pins 1 2 3 29 1 11 5 CPU Voltage J6M1 30 1 11 6 BIOS Recovery J7A1 30 1 12 Reliability 30 1 13 Environmental 30 1 14 Power Consumption 31 1 15 Regulatory Compliance 31 1 15 1 Safety 31 1 15 2 EMI 32 1 15 3 P...

Page 5: ...s 45 3 12 2 Main BIOS Setup Screen 46 3 12 3 Floppy Options Subscreen 47 3 12 4 IDE Device Configuration Subscreen 48 3 12 5 Boot Options Subscreen 49 3 12 6 Advanced Screen 50 3 12 7 Peripheral Configuration Subscreen 51 3 12 8 Advanced Chipset Configuration Subscreen 52 3 12 9 Power Management Configuration Subscreen 53 3 12 10 Plug and Play Configuration Subscreen 54 3 12 11 Security Screen 55 ...

Page 6: ......

Page 7: ... interfaces for up to four IDE devices such as hard drives CD ROM readers and so forth The SMC FDC37C932FR Ultra I O controller integrates the standard PC I O functions floppy interface two FIFO serial ports one EPP ECP capable parallel port a Real Time Clock keyboard controller and support for an IrDA compatible infrared interface To provide for the increasing number of multimedia applications a ...

Page 8: ...e Labs ModemBlaster connector V Optional S3 Trio64V graphics controller F Wave Table connector W Front panel connectors G External I O X Optional video memory sockets H COM 2 connector Y Configuration jumper block I Socket 7 Z Optional video memory J Optional CELP socket AA Onboard speaker K Voltage regulator BB Fan connector L Voltage regulator jumper CC SMC FDC37C932FR Ultra I O controller M Pow...

Page 9: ...he motherboard is designed to fit standard ATX form factor chassis Figure 2 illustrates the motherboard s dimensions The motherboard meets the standard ATX specification guidelines in that the outer dimensions are 12 x 9 6 Location of the I O connectors riser slot and mounting holes also meet the standard ATX specification OM04522 8 950 2 850 0 0 9 350 8 500 0 0 0 250 0 650 11 350 3 100 4 900 11 1...

Page 10: ...higher performance Pentium OverDrive processors 1 5 Memory 1 5 1 System Memory The motherboard provides two 168 pin DIMM Dual Inline Memory Module sites for DRAM memory expansion The sockets support 1 Meg x 64 8 MB 2 Meg x 64 16 MB and 4 Meg x 64 32 MB SDRAM DIMM modules and 1 Meg x 64 8 MB 2 Meg x 64 16 MB 4 Meg x 64 32 MB and 8 Meg x 64 64 MB EDO Extended Data Out DIMM modules For systems config...

Page 11: ...ctor has a keying hip located at one end of the connector This connector allows the use of both a GWE PBSRAM COAST module and a GWE Asynchronous COAST module The GWE Asynchronous modules must be built for Intel s 82430VX designs and are not interchangeable with Asynchronous modules built for 82430FX designs The reason for this incompatibility is the additional logic added to the 82430VX modules to...

Page 12: ...es PIO Mode 4 transfers up to 16 MB sec Integrated 8 x 32 bit buffer for bus master PCI IDE burst transfers Bus master mode PCI 2 1 compliance Enhanced fast DMA controller Interrupt controller and steering Counters timers SMI interrupt logic and timer with fast on off mode 1 6 4 IDE SUPPORT The motherboard provides two independent bus mastering PCI IDE interfaces that support PIO Mode 3 and Mode 4...

Page 13: ...The keyboard controller also provides for the following hot key sequences CTRL ALT DEL System software reset This sequence performs a software reset of the system by jumping to the beginning of the BIOS code and running the POST operation CTRL ALT and CTRL ALT Turbo mode selection CTRL ALT sets the system for de turbo mode emulating an 25 MHz AT and CTRL ALT sets the system for turbo mode Changing...

Page 14: ...ates the S3 Streams Processor that enables the device to convert YUV formatted video data to RGB and provides acceleration for scaling the video display without compromising picture quality or frame rate The on chip RAMDAC clock synthesizer is capable of output pixel data rates of 135 MHz providing non interlaced screen resolutions of up to 1280x1024x256 colors at 75 Hz with 2 MB of DRAM Hardware ...

Page 15: ...edded in the O S Graphics drivers for OS 2 2 11 and OS 2 WARP MS DOS applications such as AutoCAD and Microstation and driver updates for Windows 3 11 and Windows NT may be downloaded from the Intel Applications Support BBS Drivers for SCO UNIX are available from SCO 1 9 Audio Subsystem Creative Labs Vibra 16C The motherboard features a 16 bit stereo audio subsystem The audio subsystem is based up...

Page 16: ...ows audio drivers 1 9 1 Vibra 16C resource map Device Interrupt IRQ DMA Channel I O Address Creative Labs 16C Base 2 9 8 bit DMA 1 default 220h 233h default 5 default 8 bit DMA 3 240h 253h 7 16 bit DMA 5 default 260h 273h 10 16 bit DMA 7 280h 293h FM Synthesis 388h 38Bh Joystick midi port 200h 207h MPU 401 default is disabled 300h 301h 330h 331h 1 9 2 Audio Drivers Audio software and utilities are...

Page 17: ...34 1 33 5 Floppy Drive Connector J2C1 J2D1 J2E1 J2E2 PCI Connectors 4 J1A1 J1A2 J1B1 ISA Connectors 3 1 J1F1 Mod blast Connector 2 9 10 1 4 J2F2 CDROM Connector 1 J2F3 Wave Table Connector 2 7 Front Panel I O Connector J9E2 27 1 A J3F1 B J3G1 DIMM Sockets 2 A B J2J1 CELP Cache Socket 1 J7M2 Power Connector 20 1 6 J7L1 3 3 Volt Power Connector J2F1 Telephony Connector 1 Figure 3 Motherboard Connect...

Page 18: ...J2F3 Pin Signal Name 1 Wave Right 2 Ground 3 Wave Left 4 Ground 5 Key 6 Ground 7 MIDI_In 8 MIDI Out 1 10 3 Telephony Connector J2F1 Pin Signal Name 1 Mic In 2 Ground 3 Mono Out 4 Key 1 10 4 Power Connector J7M2 Pin Signal Name Pin Signal Name 1 3 3V 11 3 3V 2 3 3V 12 12V 3 Ground 13 Ground 4 5V 14 PS ON 5 Ground 15 Ground 6 5V 16 Ground 7 Ground 17 Ground 8 PW OK 18 5V 9 5VSB 19 5V 10 12V 20 5V ...

Page 19: ...nd 26 Track 00 27 MSEN0 28 Write Protect 29 Ground 30 Read Data 31 Ground 32 Side 1 Select 33 Ground 34 Diskette Change 1 10 6 IDE Connectors J9H1 J9H2 Pin Signal Name Pin Signal Name 1 Reset IDE 2 Ground 3 Host Data 7 4 Host Data 8 5 Host Data 6 6 Host Data 9 7 Host Data 5 8 Host Data 10 9 Host Data 4 10 Host Data 11 11 Host Data 3 12 Host Data 12 13 Host Data 2 14 Host Data 13 15 Host Data 1 16 ...

Page 20: ...rved 35 Addr 0 36 Addr 2 37 Chip Select 1P 1S 38 Chip Select 3P 3S 39 Activity 40 Ground 1 10 7 Front Panel I O Connectors J9E2 Pin Signal Name 1 Power On 2 Power Return 3 Sleep Req 4 Sleep Driver 5 Key 6 5V 7 Key 8 IR_RX 9 Ground 10 IR_TX 11 IR_SL1 12 Key 13 5V 14 Key 15 HD ACTIVE 16 5V 17 Key 18 Ground 19 Key 20 LED_PWR 21 Key 22 Ground 23 Reset 24 5V 25 Key 26 SPKR_DAT connect 27 SPKR_DAT ...

Page 21: ...CHRDY B11 SMEMW A11 AEN B12 SMEMR A12 SA19 B13 IOW A13 SA18 B14 IOR A14 SA17 B15 DACK3 A15 SA16 B16 DRQ3 A16 SA15 B17 DACK1 A17 SA14 B18 DRQ1 A18 SA13 B19 REFRESH A19 SA12 B20 SYSCLK A20 SA11 B21 IRQ7 A21 SA10 B22 IRQ6 A22 SA9 B23 IRQ5 A23 SA8 B24 IRQ4 A24 SA7 B25 IRQ3 A25 SA6 B26 DACK2 A26 SA5 B27 TC A27 SA4 B28 BALE A28 SA3 B29 Vcc A29 SA2 B30 OSC A30 SA1 B31 GND A31 SA0 KEY KEY D1 MEMCS16 C1 SB...

Page 22: ...e Pin Signal Name Pin Signal Name A1 Vcc B1 12 V A32 AD16 B32 AD17 A2 12 V B2 TCK A33 3 3 V B33 CBE2 A3 TMS B3 GND A34 FRAME B34 GND A4 TD1 B4 TD0 A35 GND B35 IRDY A5 Vcc B5 Vcc A36 TRDY B36 3 3 V A6 INTA B6 Vcc A37 GND B37 DEVSEL A7 INTC B7 INTB A38 STOP B38 GND A8 Vcc B8 INTD A39 3 3 V B39 PLOCK A9 Reserved B9 Prsnt1 A40 SDONE B40 PERR A10 Vcc B10 Reserved A41 SBO B41 3 3 V A11 Reserved B11 Prsn...

Page 23: ...indows 95 Start menu The system BIOS will turn the system power off when it receives the proper APM command from the OS For example Windows 95 will issue this APM command when the user selects Shutdown the computer option APM must be enabled in the system BIOS and OS in order for the soft off feature to work correctly In order for the system to recognize the presence of a soft off power supply the...

Page 24: ...LED HD LED Infrared Sleep Pwr On Figure 4 Front Panel I O Connectors 1 10 11 1 Speaker The speaker provides error beep code information during the Power On Self Test if the system cannot use the video interface As a manufacturing option an on board piezoelectric speaker may be present The on board speaker may be disabled by removing a jumper from the front panel speaker connector and connecting an...

Page 25: ...S and the Operating System s APM driver is loaded Sleep mode Stand By can be entered in one of three ways an optional front panel Sleep Resume button a user defined keyboard hot key or prolonged system inactivity The Sleep Resume button is supported by a 2 pin header pins 3 and 4 located on the front panel I O connector J9E2 Closing the Sleep switch will generate an SMI System Management Interrupt...

Page 26: ...ote power on off can be turned OFF from one of two sources the front panel power ON OFF switch or a soft off signal coming from the Super I O controller that can be controlled by the operating system In soft off an APM command issued to the system BIOS will cause the power supply to turn OFF via the PS ON control signal on the power connector For example Windows 95 will issue this APM command when...

Page 27: ... Port PS 2 Mouse USB Connectors Figure 5 I O Connections 1 10 13 Add in Board Expansion Connectors Expansion Slots support up to four PCI and up to three ISA add in boards The PCI bus is fully compliant with the PCI 2 1 specification and supports up to four bus master devices through the four PCI connectors ...

Page 28: ...ations Table 2 Configuration Jumper Settings Function Jumper Configuration Host Bus Speed Note These jumpers also set PCI and ISA clock speeds J9C1 C See Table 3 CPU Speed Ratio J9C1 D See Table 3 CMOS Clear J9C1 A 4 5 Keep Default 5 6 Clear Password Clear J9C1 A 1 2 Password Enabled Default 2 3 Password Clear Disabled CMOS Setup Access J9C1 B 1 2 Access Allowed Default 2 3 Access Denied Reserved ...

Page 29: ...ystem on When the system reports that NVRAM cleared by jumper the system can be turned off and the jumper should be returned to the 4 5 position to restore normal operation This procedure should be done whenever the system BIOS is updated Default is for this jumper to be on pins 4 5 1 11 3 Password clear J9C1 A Pins 1 2 3 Allows system password to be cleared by moving the jumper from pins 1 2 to p...

Page 30: ...6 BIOS Recovery J7A1 This jumper allows the BIOS to be recovered if it has been corrupted by moving the jumper from the 1 2 position to the 2 3 position and inserting a recovery diskette Default setting is for normal operation 1 2 position 1 12 Reliability The Mean Time Between Failures MTBF data is calculated from predicted data 55C Motherboard 80 798 hours 1 13 Environmental Table 4 Motherboard ...

Page 31: ...uit assembly complies with the following safety and EMI regulations when correctly installed in a compatible host system 1 15 1 Safety 1 15 1 1 UL 1950 CSA 950 95 3rd edition dated 3 28 95 The Standard for Safety of Information Technology Equipment including Electrical Business Equipment USA Canada 1 15 1 2 CSA C22 2 No 950 93 3rd Edition The Standard for Safety of Information Technology Equipment...

Page 32: ...efined in the FCC Rules Subpart B These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates and uses energy of about the same frequency as radio and TV signals Installed correctly it will not interfere with your radio and TV However we do not guarantee that is will not interfere For more information about interfer...

Page 33: ... electromagnetic compatibility the host system enclosure and power supply should have passed electromagnetic compatibility testing using a board with a microprocessor from the same family as the microprocessor on this board operating at the same or higher microprocessor speed Also only peripherals computer input output devices terminals printers etc that are CE Marked and certified by the FCC to c...

Page 34: ...nal ports which provide DC power externally U S For safety a certification mark by a Nationally Recognized Testing Laboratory NRTL such as UL CSA or ETL External wiring must be UL Listed and suitable for the use Internal wiring must be UL Listed or Recognized and rated appropriately for the voltages and temperatures involved For electromagnetic interference the FCC mark Class A for commercial or i...

Page 35: ...rload Protection Unless the power supply is provided with inherent overcurrent protection use caution to avoid overloading the power supply output This can be accomplished by assuring that the calculated total current load of all the modules within the system is less than the output current rating of the power supply Failure to accomplish this could result in overheating in the power supply which ...

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Page 37: ...emory open to ISA and PCI bus 640K 799K A0000 C7FFF 160K On board video memory and BIOS 639K 9FC00 9FFFF 1K Extended BIOS Data moveable by QEMM 386MAX 512K 638K 80000 9FBFF 127K Extended conventional 0K 511K 00000 7FFFF 512K Conventional 2 2 I O Map Table 7 I O Map Address hex Size Description 0000 000F 16 bytes PIIX3 DMA 1 0020 0021 2 bytes PIIX3 Interrupt Controller 1 0040 0043 4 bytes PIIX3 Tim...

Page 38: ...oard Serial Port 2 0330 0331 2 bytes Audio MUP 401 0376 1 byte Sec IDE Chan Cmd Port 0378 037B 4 bytes Parallel Port 1 0388 038B 4 bytes Audio FM Synthesis 03B0 03BB 4 bytes S3 Trio64 V 03C0 03DF 16 bytes S3 Trio64 V 03F0 03F5 6 bytes Floppy Channel 1 03F6 1 byte Pri IDE Chan Cmd Port 03F7 Write 1 byte Floppy Chan 1 Cmd 03F7 bit 7 1 bit Floppy Disk Chg Chan 1 03F7 bits 6 0 7 bits Pri IDE Chan Stat...

Page 39: ...ntel 82371FB PIIX3 PCI ISA bridge 00 07 01 Intel 82371FB PIIX3 IDE Bus Master 00 07 02 Intel 82371FB PIIX3 USB 00 0D 00 PCI Expansion Slot J2C1 00 0E 00 PCI Expansion Slot J2D1 00 0F 00 PCI Expansion Slot J2E1 00 10 00 PCI Expansion Slot J2E2 2 5 DMA Channels Table 9 DMA Channels DMA Data Width System Resource 0 8 or 16 bits Open 1 8 or 16 bits Audio default 2 8 or 16 bits Floppy 3 8 or 16 bits Pa...

Page 40: ...buffer full 2 Reserved Cascade interrupt from slave PIC 3 Serial Port 2 4 Serial Port 1 5 Creative 16C Audio default 6 Floppy 7 Parallel Port 1 8 Real Time Clock 9 User available 10 User available 11 User available 12 Onboard Mouse Port if present else user available 13 Reserved Math coprocessor 14 Primary IDE if present else user available 15 Secondary IDE if present else user available ...

Page 41: ...ntifying the type of BIOS and a five digit revision code The initial production BIOS in the motherboard will be identified as 1 00 0x CY0 Information on BIOS functions can be found in the IBM PS 2 and Personal Computer BIOS Technical Reference published by IBM and the ISA and EISA Hi Flex AMIBIOS Technical Reference published by AMI Both manuals are available at most technical bookstores 3 2 BIOS ...

Page 42: ...annel support are setup up automatically by the BIOS if the user selects Autoconfiguration in setup The IDE interface supports PIO Mode 3 and Mode 4 hard drives and recognition of ATAPI CD ROMs tape drives and any other ATAPI devices The BIOS will determine the capabilities of each drive and configure them to optimize capacity and performance For the high capacity hard drives typically available t...

Page 43: ...S Peer to peer hierarchical PCI Bridge 1 0 is supported and by using an OEM supplied option ROM or TSR a PCI to PCMCIA bridge capability is possible as well 3 6 ISA Plug and Play The BIOS incorporates ISA Plug and Play capabilities as delivered by Plug and Play Release 1 0A Plug and Play BIOS V 1 0A ESCD V 1 03 When used in conjunction with the ISA Configuration Utility ICU for DOS or Windows 3 x ...

Page 44: ...ke effect Windows 95 will enable APM automatically upon detecting the presence of the APM BIOS 3 8 Language Support The BIOS setup screen and help messages are supported in 32 languages There are 5 languages translated at this time for use American English German Italian French and Spanish Translations of other languages will available at a later date With a 1 Mb Flash BIOS only one language can b...

Page 45: ... disabled 3 12 BIOS Setup Program The ROM based Setup utility allows the configuration to be modified without opening the system for most basic changes The Setup utility is accessible only during the Power On Self Test POST by pressing the F1 key after the POST memory test has begun and before boot begins A prompt may be enabled that informs users to press the F1 key to access Setup A jumper setti...

Page 46: ...ifying options that affect the serial ports the parallel port and the disk drive interfaces Advanced Chipset Configuration For modifying options that affect memory and system busses Power Management Configuration For accessing and modifying Advanced Power Management APM options Plug and Play Configuration For modifying options that affect the system s Plug and Play capabilities 3 12 2 Main BIOS Se...

Page 47: ...age of the text strings used in the Setup program and the BIOS The options are any installed languages 3 12 2 9 Boot Options When selected this brings up the Boot Options subscreen 3 12 2 10 Video Mode Reports the video mode There are no options 3 12 2 11 Mouse Reports if a mouse is installed or not There are no options 3 12 2 12 Base Memory Reports the amount of base memory There are no options 3...

Page 48: ...fault is Auto Configured If you select User Definable then the Number of Cylinders Number of Heads and Number of Sectors items can be modified 3 12 4 2 Number of Cylinders If IDE Device Configuration is set to User Definable you must type the correct number of cylinders for your hard disk If Hard Disk Type is set to Auto Configured this reports the number of cylinders for your hard disk and cannot...

Page 49: ...st Programmed I O Modes Sets how fast transfers on the IDE interface occur The options are Disabled or Auto Detected The default is Auto Detected If set to Disabled transfers occur at a less than optimized speed If set to Auto Detected transfers occur at the drive s maximum speed 3 12 5 Boot Options Subscreen This section describes the options available on the Boot Options subscreen 3 12 5 1 First...

Page 50: ...The default is 250 If Typematic Rate Programming is set to Default this option will not be visible 3 12 5 8 Typematic Rate Sets the speed at which characters repeat when you hold down a key on the keyboard The higher the number the faster the characters repeat The options are 6 8 10 12 15 20 24 and 30 characters per second The default is 6 If Typematic Rate Programming is set to Default this optio...

Page 51: ...IR Mode and the Parallel Port Address cannot be modified The settings displayed for those options reflect the current state of the hardware 3 12 7 2 PCI IDE Interface Enables or disables the PCI IDE hard disk interface The options are Enabled and Disabled The default is Enabled If Configuration Mode is set to Auto this option cannot be modified 3 12 7 3 Floppy Interface Enables or disables the dis...

Page 52: ...he setup program assigns LPT1 378h IRQ7 as the parallel port address regardless of what is selected under the Parallel Port Address option If Configuration Mode is set to Auto this option cannot be modified 3 12 7 8 Parallel Port Mode Selects the mode for the parallel port The options are Compatible Bi directional EPP and ECP The default is Compatible Compatible means the parallel port operates in...

Page 53: ...the Advanced Power Management APM support in your system s BIOS The options are Enabled and Disabled The default is Enabled Power Management will only work with APM capable operating systems to manage power consumption in your system If Advanced Power Management is set to Disabled none of the fields in the Advanced Power Management subscreen will be visible 3 12 9 2 IDE Drive Power Down Sets any I...

Page 54: ...f this is set to Disabled the ISA Shared Memory Base Address described below will not be visible Shadowing is a technique that copies a block of memory from an add in card s ROM to the same address in system memory This provides faster access and achieves higher performance By default all upper memory is shadowed 3 12 10 4 ISA Shared Memory Base Address Sets the base address for the ISA Shared Mem...

Page 55: ...ons depend on whether either the Administrative or User passwords or both are set See the table below for a description of how the passwords actually work together To limit access to who can boot the system set the User password This is the password that the system asks for before booting If only the Administrative password is set the system boots up without asking for a password If both passwords...

Page 56: ...can enable this option If Enabled is selected the system boots but the keyboard will be locked until the User password is entered 3 12 12 6 Security Hot Key CTRL ALT Sets a hot key that when pressed locks the keyboard until the User password is entered The Keyboard LEDs flash to indicate that the keyboard is locked When you enter the User password you do not have to press the Enter key 3 12 13 Exi...

Page 57: ...Setup program to do this This selection loads the default Setup values from the ROM table 3 12 13 4 Discard Changes Discards any changes you made during the current Setup session without exiting the program You can also press the F6 key anywhere in the Setup program to do this This selection loads the CMOS RAM values that were present when the system was turned on ...

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Page 59: ...rite Error The system video adapter is either missing or its memory is faulty This is not a fatal error 9 ROM Checksum Error ROM checksum value does not match the value encoded in BIOS 10 CMOS Shutdown Register Rd Wrt Error The shutdown register for CMOS RAM failed 11 Cache Error External Cache Bad The external cache is faulty 4 2 PCI Configuration Error Messages The following PCI messages are dis...

Page 60: ...board Cache Memory Bad Do Not Enable Cache Cache memory is defective CH 2 Timer Error There is an error in timer 2 CMOS Battery State Low CMOS RAM is powered by a battery The battery power is low Replace the battery CMOS Checksum Failure After CMOS RAM values are saved a checksum value is generated for error checking The previous value is different from the current value Run Setup CMOS System Opti...

Page 61: ...t be unlocked to continue Keyboard Error There is a timing problem with the keyboard Set the Keyboard option in Standard CMOS Setup to Not Installed to skip the keyboard POST routines KB Interface Error There is an error in the keyboard connector Off Board Parity Error Parity error in memory installed in an expansion slot The format is OFF BOARD PARITY ERROR ADDR HEX XXXX XXXX is the hex address w...

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