Intel
®
PXA27x Processor Developer’s Kit - User’s Guide
59
3.2.2.6
Miscellaneous Write Register 2 (MSCWR2)
MSCWR2, defined in
, allows software to control the peripherals and functions listed in
the table below.
Note:
Ignore reads from reserved bits. Write 0b0 to reserved bits.
Table 23. MSCWR2 Bit Definitions
Physical Address: 0x0800_0084
MSCWR2
Intel
®
PXA27x Processor Developer’s
Kit
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Reserved
FPG Reserved
nLEGACY_
SEL
GRAP
HICS
_S
E
L
US
B_
O
T
G_
RS
T
US
B_
O
T
G_
SE
L
nUS
BC_
S
C
LINE
2_
S
P
KR
_OFF
LINE
1_
S
P
KR
_OFF
RAD
IO
_
P
W
R
RAD
IO
_
W
AKE
Reset
?
?
?
?
?
?
?
0
0
0
0
0
1
1
0
0
Bits
Name
Access
Description
15:9
Reserved
R/W
reserved
8
nLEGACY_SEL
R/W
Legacy Mode control
1 - MSL mode
PCE1 <= GPIO86/L_DD16
nPCE2 <= GPIO87/L_DD17
0 - Legacy mode
nPCE1 <= GPIO85/BB_IB_WAIT
nPCE2 <= GPIO54/BB_OB_WAIT
7
GRAPHICS_SEL
R/W
Graphics Accelerator control
1 - Graphics Accelerator enablednCS1 => Graphics Accelerator
nCS5 => Graphics Accelerator
0 - Graphics Accelerator disablednCS1 => Secondary Flash
nCS5 => Expansion Board
6
USB_OTG_RST
R/W
USB On The Go External Transceiver Reset
0 = Hold USB OTG External transceivers in reset
1 = Enable USB OTG External Transceiver
5
USB_OTG_SEL
R/W
USB On The Go Control
0 = FFUART Enabled
1 = USB OTG Enabled
4
nUSBC_SC
R/W
USB client soft connect control:
0 = USB client detection enabled
1 = USB client detection disabled
3
LINE2
R/W
Line Out 2 amplifier control:
0 = amplifier operational
1 = amplifier shut down
2
LINE1
R/W
Line Out 1 amplifier control:
0 = amplifier operational
1 = amplifier shut down
1
RADIO_PWR
R/W
Radio module power control:
0 = power off
1 = power on
0
RADIO_
WAKE
R/W
Radio module wake-up signal:
0 = wake deasserted
1 = wake asserted
Summary of Contents for PXA27x Series
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