2:490
Volume 2, Part 1: Processor Abstraction Layer
PAL_VPS_RESUME_NORMAL
External Interrupt Control
Registers
The external interrupt control registers contain the state of the virtual
processor if d_extint in Virtualization Disable Control (
vdc
) is 1. Otherwise
the external interrupt control registers are virtualized by the VMM and
contain VMM state.
Data/Instruction Breakpoint
Registers
The data/instruction breakpoint registers contain the state of the virtual
processor if d_ibr_dbr in Virtualization Disable Control (
vdc
) is 1.
Otherwise the data/instruction breakpoint registers are virtualized by the
VMM and contain VMM state.
Performance Monitor
Configuration Registers
The performance monitor configuration registers contain the state of the
virtual processor if d_pmc in Virtualization Disable Control (
vdc
) is 1.
Otherwise the performance monitor configuration registers are virtualized
by the VMM and contain VMM state.
Performance Monitor Data
Registers
Contain the state of the virtual processor.
a. Interval Timer Offset register is not supported on all processor implementations. See
Timer Offset (ITO – CR4)” on page 2:34
for details.
Table 11-123. Processor Status Register Settings for Virtual Processor
Execution
Field
Bits
Description
User Mask = PSR{5:0}
rv
0
Reserved
be
1
Contain user mask of the virtual processor.
up
2
ac
3
mfl
4
mfh
5
System Mask = PSR{23:0}
ic
13
Must be 1.
i
14
VMM-specific.
pk
15
rv
12:6,
16
Reserved
dt
17
Must be 1.
dfl
18
VMM-specific.
dfh
19
sp
20
pp
21
di
22
si
23
PSR.l = PSR{31:0}
db
24
VMM-specific.
lp
25
Contains the lp bit of the virtual processor.
tb
26
Contains the tb bit of the virtual processor.
rt
27
Must be 1.
rv
31:28
Reserved
PSR{63:0}
Table 11-122. Virtual Processor Settings in Architectural Resources for
PAL_VPS_RESUME_NORMAL and PAL_VPS_RESUME_HANDLER
Resource
Description
Summary of Contents for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3
Page 1: ......
Page 11: ...x Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 13: ...1 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 33: ...1 22 Volume 1 Part 1 Introduction to the Intel Itanium Architecture ...
Page 57: ...1 46 Volume 1 Part 1 Execution Environment ...
Page 147: ...1 136 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 149: ...1 138 Volume 1 Part 2 About the Optimization Guide ...
Page 191: ...1 180 Volume 1 Part 2 Predication Control Flow and Instruction Stream ...
Page 230: ......
Page 248: ...236 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 250: ...2 2 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 264: ...2 16 Volume 2 Part 1 Intel Itanium System Environment ...
Page 380: ...2 132 Volume 2 Part 1 Interruptions ...
Page 398: ...2 150 Volume 2 Part 1 Register Stack Engine ...
Page 486: ...2 238 Volume 2 Part 1 IA 32 Interruption Vector Descriptions ...
Page 750: ...2 502 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 754: ...2 506 Volume 2 Part 2 About the System Programmer s Guide ...
Page 796: ...2 548 Volume 2 Part 2 Interruptions and Serialization ...
Page 808: ...2 560 Volume 2 Part 2 Context Management ...
Page 842: ...2 594 Volume 2 Part 2 Floating point System Software ...
Page 850: ...2 602 Volume 2 Part 2 IA 32 Application Support ...
Page 862: ...2 614 Volume 2 Part 2 External Interrupt Architecture ...
Page 870: ...2 622 Volume 2 Part 2 Performance Monitoring Support ...
Page 891: ......
Page 1099: ...3 200 Volume 3 Instruction Reference padd Interruptions Illegal Operation fault ...
Page 1295: ...3 396 Volume 3 Resource and Dependency Semantics ...
Page 1296: ......
Page 1302: ...402 Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1494: ...4 192 Volume 4 Base IA 32 Instruction Reference FWAIT Wait See entry for WAIT ...
Page 1647: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Page 1884: ...4 582 Volume 4 IA 32 SSE Instruction Reference ...
Page 1885: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Page 1886: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Page 1898: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...