Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Manual

Page: 1096 / 1898

Volume 3: Instruction Reference 3:197
padd
padd — Parallel Add
Format: (
qp
) padd1
r
1
=
r
2
,
r
3
one_byte_form, modulo_form A9
(
qp
) padd1.sss
r
1
=
r
2
,
r
3
one_byte_form, sss_saturation_form A9
(
qp
) padd1.uus
r
1
=
r
2
,
r
3
one_byte_form, uus_saturation_form A9
(
qp
) padd1.uuu
r
1
=
r
2
,
r
3
one_byte_form, uuu_saturation_form A9
(
qp
) padd2
r
1
=
r
2
,
r
3
two_byte_form, modulo_form A9
(
qp
) padd2.sss
r
1
=
r
2
,
r
3
two_byte_form, sss_saturation_form A9
(
qp
) padd2.uus
r
1
=
r
2
,
r
3
two_byte_form, uus_saturation_form A9
(
qp
) padd2.uuu
r
1
=
r
2
,
r
3
two_byte_form, uuu_saturation_form A9
(
qp
) padd4
r
1
=
r
2
,
r
3
four_byte_form, modulo_form A9
Description:
The sets of elements from the two source operands are added, and the results placed in
GR
r
1
.
If a sum of two elements cannot be represented in the result element and a saturation
completer is specified, then saturation clipping is performed. The saturation can either
be signed or unsigned, as given in
Table 2-43 . If the sum of two elements is larger than
the upper limit value, the result is the upper limit value. If it is smaller than the lower
limit value, the result is the lower limit value. The saturation limits are given in
Table 2-44 .
Table 2-43. Parallel Add Saturation Completers
Completer Result r
1
treated as Source r
2
treated as Source r
3
treated as
sss signed signed signed
uus unsigned unsigned signed
uuu unsigned unsigned unsigned
Table 2-44. Parallel Add Saturation Limits
Size Element Width
Result r
1
Signed Result r
1
Unsigned
Upper Limit Lower Limit Upper Limit Lower Limit
1 8 bit 0x7f 0x80 0xff 0x00
2 16 bit 0x7fff 0x8000 0xffff 0x0000
Figure 2-29. Parallel Add Examples
GR r
2
:
GR r
1
:
GR r
3
:
+ + + +
padd1 padd2
GR r
2
:
GR r
1
:
GR r
3
:
+ + + + + + + +