Intel® Quiet System Technology (Intel® QST)
66
Thermal and Mechanical Design Guidelines
7.2
Board and System Implementation of Intel
®
QST
To implement Intel QST, the board must be configured as shown in Figure 7-3 and
listed below:
•
ME system (S0–S1) with Controller Link connected and powered
•
DRAM with Channel A DIMM 0 installed and 2 MB reserved for Intel QST FW
execution
•
SPI Flash with sufficient space for the Intel QST Firmware
•
SST-based thermal sensors to provide board thermal data for Intel QST algorithms
•
Intel QST firmware
Figure 7-3. Intel
®
QST Platform Requirements
Note:
Simple Serial Transport (SST) is a single wire bus that is included in the ICH8 to
provide additional thermal and voltage sensing capability to the Intel Management
Engine (ME).
Processor
ME
SPI
Flash
Intel®
ICH8
DRAM
Controller Link
DRAM
FSC
Control
SPI
SST
Sensor
Intel® (G)MCH
ME
Summary of Contents for AT80569PJ080N - Core 2 Quad 3 GHz Processor
Page 24: ...Processor Thermal Mechanical Information 24 Thermal and Mechanical Design Guidelines...
Page 80: ...Heatsink Clip Load Metrology 80 Thermal and Mechanical Design Guidelines...
Page 82: ...Thermal Interface Management 82 Thermal and Mechanical Design Guidelines...
Page 108: ...Fan Performance for Reference Design 108 Thermal and Mechanical Design Guidelines...
