Intel 536EPXX - PRELIMINARY Datasheet Download Page 13

Host Accelerated Modem 56K V.92 Chipset — 536EPXX

Preliminary Datasheet

Intel Confidential

27

8.0

Hardware Interfaces

The 536EPXX chipset supports hardware interfaces for the host, expansion bus, non-volatile RAM 
(NVRAM), CODEC/DAA, speaker, microphone, and general-purpose I/O functions. The hardware 
interfaces are demonstrated below.

8.1

NVRAM Interface

536EPXX is designed to support either 2K or 4K EEPROM in x8 or x16 mode. NVRAM can be 
used to customize the Subsystem Vendor ID and Subsystem ID per the manufacturer’s 
requirement. 536EPXX can also be used without the NVRAM, in this case 536EPXX will default 
to one of the ID’s listed in 

Table 16

 depending on how the GPIO 8 through 11 are tied.

PCI configuration data to use. 

Table 16

 describes this.

Figure 4.  Modem System Block Diagram (536EPXX)

MD1724

TIP

RING

HOST

MICROPHONE / SPEAKER

(OPTIONAL)

COMPUTER

DSP

DQ82536

AFE

PCI BUS

NVRAM

CODEC

DAA

536EPXX

Table 16.  PCI Subsystem Vendor ID and Subsystem ID with No EEPROM

GPIO[10:8]

Subsystem Vendor

Subsystem ID

000

Reserved

1040h

001

Reserved

1040h

010

Reserved

1040h

011

Reserved

1040h

100

Reserved

1040h

101

Reserved

1040h

110

Reserved

1040h

111

Reserved

1040h

000

Intel (ID = 8086)

1000h

Summary of Contents for 536EPXX - PRELIMINARY

Page 1: ...C telephony International telephony support Voice compression ADPCM linear and CL1 4800 7200 8000 9600 and 11025 samples sec Full duplex echo cancelled digital speakerphone Telephone emulation for hea...

Page 2: ...and other countries Intel may make changes to specifications and product descriptions at any time without notice Designers must not rely on the absence or characteristics of any features or instructi...

Page 3: ...e amount of silicon used These cost saving advantages make the 536EPXX a superior high performance and feature rich alternative to software modems With an integrated PCI interface this ITU V 92 soluti...

Page 4: ...01 voice command standards Intel also provides DAA design recommendations that support international telephony applications 1 5 Reference Design Available Intel provides a reference design that demons...

Page 5: ...liminary Datasheet Intel Confidential 19 Figure 3 Functional Block Diagrams 536EPU G TIP RING HOST COMPUTER DSP DQ82536 PCI BUS NVRAM Silicon 536EPA TIP RING HOST COMPUTER DSP DQ82536 PCI BUS NVRAM DA...

Page 6: ...igure 3 Functional Block Diagrams Continued 536EPUS GS GL TIP RING HOST COMPUTER DSP DQ82536 PCI BUS NVRAM AFE MD1724 MICROPHONE SPEAKER OPTIONAL 536EPAS TIP RING HOST COMPUTER DSP DQ82536 PCI BUS NVR...

Page 7: ...odates either 5 V or 3 3 V designs reducing power consumption 6 2 Analog Front End Device AFE The MD1724 AFE device uses Delta Sigma techniques to convert analog information from a telephone line to d...

Page 8: ...is compatible with any communication application software that supports the Hayes AT command set 7 1 2 Fax Mode In fax mode the chipsets operate at up to 14 4 kbps transmit and receive and implement a...

Page 9: ...hearing an echo 7 2 2 Transmit Levels The factory default transmit level for V 92 and V 34 transmission is 10 dBm 1 dB at Tip and Ring Data and fax use separate transmission levels The transmit level...

Page 10: ...and time 7 2 9 International Support The Intel chipsets support international applications For information on specific countries contact your local Intel sales office at the address listed on the bac...

Page 11: ...Modulation Baud Rate symbols sec Carrier Frequency Hz Constellation Points Fax V 17 14 400 TCM 2400 1800 128 12 000 TCM 2400 1800 64 9600 TCM 2400 1800 32 7200 TCM 2400 1800 16 V 29 9600 QAM 2400 170...

Page 12: ...s 2400 QAM 600 1200 2400 16 V 22 1200 DPSK 600 1200 2400 4 Data cont V 21 300 FSK 300 980 M 1650 M 1180 S 1850 S 2 Bell 212A 1200 DPSK 600 1200 2400 4 Bell 103 300 FSK 300 1270 M 2225 M 1070 S 2025 S...

Page 13: ...ID per the manufacturer s requirement 536EPXX can also be used without the NVRAM in this case 536EPXX will default to one of the ID s listed in Table 16 depending on how the GPIO 8 through 11 are tied...

Page 14: ...ate When initialized by system software the function goes to D0 active 8 3 2 D2 D2 may be entered when a PCI bus function is idle This provides significant power savings and allows the function to ret...

Page 15: ...fier necessary to drive an external speaker The output of the internal amplifier can be connected directly to a speaker or to the input of the host speaker amplifier The internal amplifier is capable...

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