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Inova ICP-CM User Manual Download Page 93

©2004 Inova Computers GmbH

Page E-1

ICP-P4/PM/CM Appendix-E

Appendix E

AGP-R7000

CompactPCI

®

E

AGP-R7000

AGP-R7000

E1 AGP-R7000 CPU Extension.......  E-2

Table E1.00 AGP Piggyback Configurations .................................................................................  E-2

E1.1 Specifications ...........................................................................................  E-3
E1.2 J4 Interface ...............................................................................................  E-4

Figure E1.20 J4 on the Underside of the AGP-R7000 Piggyback ...................................................  E-4
Table E1.20 J4 Pinout .................................................................................................................  E-5
Table E1.20 J4 Pinout - Contd. ....................................................................................................  E-6

E1.3 J3 & J5 IBP-GS-MULTILINK (TFT) Interfaces ...............................................  E-7

Figure E1.30 J3 and J5 Topside Connectors for the Inova IPB-GS-MULTILINK ................................  E-7
Table E1.30 J3 & J5 Interface Pinout ...........................................................................................  E-8

E1.4 J1 Front-Panel VGA/TMDS Interface ..........................................................  E-9

Figure E1.40 Standard Front-Panel VGA/TMDS Interface .............................................................  E-9
Table E1.40 J1 Standard Front-Panel VGA/TMDS Pinout ..............................................................  E-9
Table E1.41 J2 DIP Switch Settings - Digital TMDS (PanelLink) or DVI-D ....................................  E-10
Table E1.42 J2 DIP Switch Settings - TFT (24Bit TTL/CMOS) ......................................................  E-10

E1.5 Rear I/O VGA Interface ...........................................................................  E-11

Summary of Contents for ICP-CM

Page 1: ...CompactPCI ICP CM Intel Celeron M Low Power CPU Boards USER S MANUAL Publication Number PD00941013 001 AB MAN ICP CM...

Page 2: ...ova Computers GmbH assumes no responsibility or liability for any errors or inaccuracies that may appear in this user s manual Except as otherwise agreed no part of this publication may be reproduced...

Page 3: ...01 Interfacing 1 4 1 02 Peripherals 1 4 1 03 Software 1 4 1 04 Graphics 1 4 1 1 Specifications 1 5 1 2 Functional Overview 1 7 Figure 1 20 ICP CM Interfacing 1 7 Figure 1 21 ICP CM Board Overview 1 8...

Page 4: ...at Sink Assembly 1 17 1 48 Construction 8HP Standard CPU with AGP 1 18 Figure 1 48 Construction of CPU with Heat Sink Assembly 1 18 1 49 Power Requirements 1 19 Table 1 49 ICP CM Power Reqirements 1 1...

Page 5: ...2 Interfaces 3 9 3 21 J6 J7 Ethernet 3 9 Figure 3 21 RJ45 Pinout 3 9 Table 3 21 Ethernet Standards Connector Signals 3 9 3 22 J17 VGA Interface 3 10 3 23 Graphic Features Chipset 3 10 Table 3 23a high...

Page 6: ...nterface Pinout B 4 Table B1 4 LPT1 Connector Signals B 4 C1 ITM RIO CPU Extension C 2 C1 1 ITM RIO D Configurations C 2 Table C1 10 Valid Rear I O Configurations C 2 Table C1 11 Rear I O Module Funct...

Page 7: ...tion D 5 D1 4 IPM ATA PCMCIA D 6 Figure D1 4 IPM ATA PCMCIA Board Layout D 6 Table D1 4 IPM ATA PCMCIA Jumper Description D 6 D1 5 Device Compatibility D 7 Table D1 5 Compatibility List D 7 E1 AGP R70...

Page 8: ...es or disrupt the conductive tracks on the board Do not exceed the specified operational temperature ranges of the board version ordered If batteries are present their temperature restrictions must be...

Page 9: ...13 001 ICP CM Preface CompactPCI Revision History Manual MAN ICP CM Publication Number PD00941013 XXX Issue Author Date of Issue PD00941013 001 AB 26 07 2004 Revision History Preliminary First Release...

Page 10: ...r to refund the original cost of purchase if appropriate In the event of repair refund or replacement of any part the ownership of the removed or replaced parts reverts to Inova and the remaining part...

Page 11: ...s 1 4 1 03 Software 1 4 1 04 Graphics 1 4 1 1 Specifications 1 5 1 2 Functional Overview 1 7 Figure 1 20 ICP CM Interfacing 1 7 Figure 1 21 ICP CM Board Overview 1 8 1 3 Software 1 9 1 31 Windows XP P...

Page 12: ...ptions 1 14 1 45 Interface Positions 1 15 Figure 1 45 Interfaces 1 15 1 46 Construction 4HP Standard CPU 1 16 Figure 1 46 Construction of CPU with Heat Sink Assembly 1 16 1 47 Construction 8HP Standar...

Page 13: ...ithout board modification The auto detect mechanism in the PCI PCI bridge permits the same CPU to operate as a system Master controller or reside in a peripheral slot A Slave CM CPU is thus able to co...

Page 14: ...use and keyboard 1 03 Software The following operating systems are compatible with Inova s CM 3U CompactPCI CPU N Linux N Windows 2000 N Windows XP N Windows NT VenturCom RTX Real Time Extension On re...

Page 15: ...hannels each supporting 2 devices A Ultra DMA 133 support A Real Time Clock A Watchdog programmable up to 256 hours issues SMI or Reset A Interrupt controller A Power Management Unit PC87393 A Floppy...

Page 16: ...DE standard 40 pin header 80 strand ATA 5 compatible supporting 2 pairs Master Slave hard disks or CD ROMs 8HP front panel with 2x USB 2 0 COM1 COM2 combined PS 2 mouse keyboard 12HP panel has LPT USB...

Page 17: ...entical to rear I o D except that the VGA COM and PS 2 mouse options are not available In order to take full advantage of the rear I O features the CompactPCI backplane needs to support them Inova pro...

Page 18: ...aces 32 bit and rear I O AGP 4x Socket for Inova Graphic Module Socket mPGA479M for 600MHz or 1 3GHz Celeron M Processor Figure 1 21 ICP CM Board Overview VGA GigaST R TMDS DVI or TFT etc CompactFlash...

Page 19: ...0 API and Video Port Extensions With Plug and Play automatic installation of new hardware is possible with only minimal configuration More than 12 000 devices support this functionality 1 33 Linux Bei...

Page 20: ...03 1b real time extensions fast and flexible I O sys tem etc are some of the many key features 1 37 OS 9 x86 Microware s real time operating system has a track record that has been proved in the indus...

Page 21: ...tionality may change without notice Note 32 bit with or without Rear I O RIO configurations are possible User s of NI peripheral cards should check to see whether signal conflict is possible with the...

Page 22: ...s 1 43 Connector Description Table 1 43 Connector Description Connector Description J1 J2 CompactPCI Interface Connector J4 AGP 4x for Optional Inova Graphic Piggyback J6 10BaseT 100BaseTx Fast Ethern...

Page 23: ...nal USB 2 0 interface USB 1 J17 VGA interface soldered D Sub for onboard Chipset or from AGP piggyback SW1 Reset button switch Interface Description Location Ethernet 2x RJ45 connector common to all C...

Page 24: ...are realised in a similar way except the front panel will be cut away to the right of the VGA connector to permit passage of the flat band ribbon cables If the application requires a PS 2 mouse PS 2 k...

Page 25: ...ositions Figure 1 45 Interfaces Figure 1 45 shows the typical positioning of the front panel extension modules for mouse key board COM1 COM2 and LPT interfaces Note A hard disk if installed will gener...

Page 26: ...mprises N Passively cooled base with chipset VGA graphics dual Fast Ethernet and single USB 2 0 interface for mouse keyboard FD CD ROM etc The minimum airflow requirements must be compatible with the...

Page 27: ...t Ethernet three USB 2 0 interfaces combined PS 2 mouse keyboard COM1 and COM2 interfaces Behind the extended front panel is a platform for any IDE HD or Flash device with additional interfac ing for...

Page 28: ...2 inter faces Behind the extended front panel is a platform for any IDE HD or Flash device with additional interfacing for FD and LPT refer to Appendix A for further information The minimum airflow re...

Page 29: ...made to this products data sheet and user s manual Table 1 49 ICP CM Power Reqirements Symbol tMIN tMAX t 5V_rising _to_ 3 3V_rising 2ms 2ms Supply Voltages Power Dissipation Power Sequencing This CPU...

Page 30: ...ub ject to fluctuation Note There is no such thing as a typical application and so the CPU power consumption was measured with the processor in idle state in BIOS mode i e the OS power management feat...

Page 31: ...ase Conclusions that can be drawn from this table are A Single slot CPUs should not be integrated in applications where the environmental temp ex ceeds 65 C A CPUs intended for use in applications run...

Page 32: ...2004 Inova Computers GmbH Page1 22 Doc PD00941013 001 Product Overview ICP CM This page has been left blank intentionally...

Page 33: ...0 Legacy I O Map ISA Compatible Contd 2 5 2 2 Memory Mapped Peripherals 2 6 2 3 Interrupt Routing 2 6 Table 2 30 PC AT Interrupt Definitions 2 7 2 4 DMA Channel Descriptions 2 7 Table 2 40 DMA Channel...

Page 34: ...2004 Inova Computers GmbH Page2 2 Doc PD00941013 001 Configuration ICP CM 2 0 Memory Map Figure 2 00 System Architecture...

Page 35: ...ctPCI 2 Note 96kBytes are reserved for option ROM space USB Legacy 32kByte Ethernet Boot 16kByte PXE Boot 48kByte In addition 3rd party devices can also have their space here such as addi tional netwo...

Page 36: ...ired by peripheral boards and PCI devices at boot time based on the requirements of each device The assigned addresses can be determined by reading the configuration address space registers using spec...

Page 37: ...tible I O addresses for reference only Description 376 377 Secondary Hard Disk Controller 378 37F Parallel Port LPT1 Bi Directional 3F0 3F7 Floppy Disk Controller 3F8 3FF Serial Port COM1 3F6 3F7 Prim...

Page 38: ...ripheral boards and PCI devices at boot time based on the requirements of each device The assigned addresses can be deter mined by reading the configuration address space registers using PCI software...

Page 39: ...ied DMA channels Table 2 40 DMA Channel Description DMA Channel Description 0 1 2 Floppy 3 LPT1 ECP only Interrupt Request Interrupt Vector Function Assignment IRQ0 08h Timer IRQ1 09h Keyboard IRQ2 0A...

Page 40: ...e addressing of the SMB System Management Bus Devices Table 2 50 SMB Devices Address b 7 1 0101 100 1010 000 1010 101 1010 110 1010 111 1101 001 Device LM87 Temperature Monitor EEPROM SPD DDR Bank 0 E...

Page 41: ...A 0001 1039 0 0x02 0x00 N A 0008 1039 0 0x03 0x00 N A 7001 1039 0 0x03 0x01 N A 7001 1039 0 0x03 0x02 N A 7001 1039 0 0x03 0x03 N A 7002 1039 0 0x02 0x05 N A 5518 1039 0 0x02 0x07 N A 7012 1039 0 0x04...

Page 42: ...terrupt request level generated by the device depends on the backplane slot number which the board is plugged into and the interrupt signal which is driven by the particular PCI device Note CompactPCI...

Page 43: ...by the CPU as interrupt vector 08h In addition Timer 1 and Timer 2 are also initialised by the BIOS as necessary for the specific processor board functions Table 2 80 Timer and Counter Functions Time...

Page 44: ...2004 Inova Computers GmbH Page2 12 Doc PD00941013 001 Configuration ICP CM This page has been left blank intentionally...

Page 45: ...1 CompactPCI Backplane 3 7 Figure 3 10 Inova s 32 Bit CompactPCI 8 Slot Backplane RH System Slot 3 8 3 2 Interfaces 3 9 3 21 J6 J7 Ethernet 3 9 Figure 3 21 RJ45 Pinout 3 9 Table 3 21 Ethernet Standard...

Page 46: ...nnector Naming Figure 3 01 Naming Convention as per PICMG 2 0 R3 0 Specification 3 03 ICP PM Connector J1 and J2 Inova s ICP CM CPU board has been designed as a 32 bit or 64 bit system slot device abl...

Page 47: ...M66EN C BE 0 J1 20 AD 12 GND V I O AD 11 AD 10 J1 19 3 3V AD 15 AD 14 GND AD 13 J1 18 SERR GND 3 3V PAR C BE 1 J1 17 3 3V IPMB SCL IPMB SDA GND PERR J1 16 DEVSEL GND V I O STOP LOCK J1 15 3 3V FRAME...

Page 48: ...FD_DENSEL COM1_CTS VGA_VSYNC PRST REQ6 GNT6 J2 16 LPT_D0 FD_INDEX COM1_RTS LPT_ACK FD_DR1 COM1_DCD DEG GND KB_CLK J2 15 LPT_ERR FD_HDSEL COM1_DSR GND FAL REQ5 GNT5 J2 14 LPT_D1 FD_TRK0 COM1_DTR LPT_S...

Page 49: ...Contd Pin Nr Row A Row B Row C Row D Row E J2 07 LPT_BUSY FD_MTR1 COM2_DTR PM_CLK SMB_CLK ATA_D10 ATA_D11 J2 06 LPT_D6 FD_DRATE0 COM2_RI KB_DAT ATA_DMACK VGA_B ATA_D12 J2 05 LPT_D7 FD_MSEN1 64EN V I O...

Page 50: ...r COM ports are used in rear I O applications then they should not be used from the front panel Communicating from both mouse and keyboard sources is physically possible but is not recommended The fro...

Page 51: ...ally the System Slot may be located at either end of the backplane but Inova have placed theirs on the right to cater for physical expansion due to heat sink hard disk extended function ality etc The...

Page 52: ...terfaces ICP CM Figure 3 10 Inova s 32 Bit CompactPCI 8 Slot Backplane RH System Slot Note The logical slots are different to the physical slots The slot marked with the g is the System Slot and alway...

Page 53: ...wisted pair standards Figure 3 21 RJ45 Pinout Table 3 21 Ethernet Standards Connector Signals Note Users taking advantage of the CPU s rear I O options are advised not to use the front panel interface...

Page 54: ...st some of the features of the standard integrated video controller Feature Description Supports single video windows with overlay function Supports RGB555 RGB565 YUV422 and YUV420 video formats Suppo...

Page 55: ...Hz Refresh Rates Hz Refresh Rates Hz Table 3 23b Video Output Connector Signals 5 15 1 11 10 6 Figure 3 23 High Density D Sub VGA Interface Pinout Pin No Signal 1 Analog RED 2 Analog GREEN 3 Analog B...

Page 56: ...M 3 24 J19 USB Interface J19 is located as standard on the front panel All standard USB 2 0 and 1 1 compatible devices can be connected to this interface Figure 3 24 USB Interface Pinout Table 3 24 US...

Page 57: ...er required by small disk drives J9 is the standard CompactFlash interface and needs no further explanation 3 28 Connecting the CM to the Inova ICP HD3 ND Appendix A provides more information on the I...

Page 58: ...2004 Inova Computers GmbH Page3 14 Doc PD00941013 001 Interfaces ICP CM This page has been left blank intentionally...

Page 59: ...3 ND Module A 3 Table A1 2 Interface Description of the ICP HD 3 ND Module A 4 A2 ICP HD 3 ND Interfaces A 5 A2 1 COM1 COM2 Interfaces A 5 Figure A2 1 COM1 COM2 Interface Pinout A 5 Table A2 1 COM1 CO...

Page 60: ...n between the ICP HD 3 and the host CPU is performed via rigid board connec tors there aren t any flex cables on the CPU board itself This concept eliminates the risk of incorrect device installation...

Page 61: ...re should be exercised when attaching the LPT interface to this carrier board Here the connection is via a length of flex cable between J11 of the carrier and J13 on the LPT module Note Damage to the...

Page 62: ...s to use Master and Slave devices connected to J12 only or use the Rear I O feature Connector Description Open COM1 is configured for RS232 communication Closed COM1 is configured for RS485 communicat...

Page 63: ...is performed via J1 J2 COM1 COM2 illustrated in Figure A1 2 Note If the COM ports are used in rear I O applications then they should not be used from the CPU front panel The front panel COM port conn...

Page 64: ...2 and Table A2 2 respectively Note If the mouse and keyboard ports are used in rear I O applications then they should not be used from the front panel Communicating from both mouse and keyboard source...

Page 65: ...pactPCI A A2 3 USB 2 0 Interfaces Standard to all ICP HD 3 carrier board modules are the two USB 2 0 interfaces which are back ward compatible to USB 1 1 devices Figure A2 3 USB Interface Pinout Table...

Page 66: ...urther mention here Note To conform with the UDMA 66 or higher standards only suitable commercially available 80 strand ribbon cable should be used Failure to do so may result in data transmission err...

Page 67: ...1 1 J13 Interface for LPT1 B 2 B1 2 IPB FPE12 Front Panel 4HP or 12HP B 2 Figure B1 2 IPB FPE12 Stand Alone or Integrated with CPU B 2 B1 3 LPT1 Piggyback B 3 Figure B1 3 LPT1 Piggyback Board IPB FPE1...

Page 68: ...s Manual The flex cable connection and function of the LPT interface are discussed in this section B1 2 IPB FPE12 Front Panel 4HP or 12HP The Inova IPB FPE12 interface is a small piggyback available a...

Page 69: ...cable to pin 1 on the ICP HD 3 piggyback To help with the orientation the connector flanks that are blue indicate the blue face of the flex cable Unmarked flanks indi cate the metallic connection of t...

Page 70: ...yback located behind this interface connects to the hard disk carrier board ICP HD 3 mounted J13 connector Figure B1 4 LPT1 Interface Pinout Table B1 4 LPT1 Connector Signals Table B1 3 IPB FPE12 Conn...

Page 71: ...face Pinout C 6 Table C1 4 COM1 COM2 Connector Signals C 6 C1 5 LPT1 Interface C 7 Figure C1 5 LPT1 Interface Pinout C 7 Table C1 5 LPT1 Connector Signals C 7 C1 6 Mouse Keyboard Interfaces C 8 Figure...

Page 72: ...ality of the 4 Inova rear I O compatible modules Table C1 10 Valid Rear I O Configurations Table C1 11 Rear I O Module Functionality Product Name VGA Graphic Fast Ethernet USB I O Mouse Keyboard Mass...

Page 73: ...ggyback option Using the chipset graphics for both front and rear I O simultaneously is not advisable as the loading may be too great If both front and rear I O VGA are required then the twin engined...

Page 74: ...ttle by way of explanation None of the connectors can be incorrectly inserted thanks to the mechanical keying of both plug and socket Table C1 3 explains the significance of the interfaces labelled in...

Page 75: ...hysically attached but the COM ports are required then these ports will not work even if they are correctly configured in BIOS Connector Description J1 CompactPCI rear I O connector J2 Standard 3 5 ID...

Page 76: ...should not be used from the CPU front panel The front panel COM port connections are disabled automatically if using the rear I O COM port option Figure C1 4 COM1 COM2 Interface Pinout 1 6 5 9 Table C...

Page 77: ...Note If the LPT port is used in rear I O applications then it should not be used from the front panel Communi cating from both sources is physically possible but is not recommended Figure C1 5 LPT1 I...

Page 78: ...nnector pinout and description are provided in Figure C1 6 and Table C1 6 respectively Note If the mouse keyboard ports are used in rear I O applications then they should not be used from the front pa...

Page 79: ...ected to be different to that appearing on the front panel This is possible through in this case the piggyback s dual independent Radeon 7000 graphics engines Note Using the chipset graphics for both...

Page 80: ...rface board Instead if this interface is used communication traffic can still be observed on the front panel Ethernet connector Note The single channel Fast Ethernet option in table C1 10 is either ET...

Page 81: ...4 Standard to all rear I O D transition modules is the peripheral USB 1 1 port Figure C1 9 and Table C1 9 provide the pinout and signal description of this standard Ethernet interface respec tively Fi...

Page 82: ...res no further mention here Note To conform with the ATA 5 standard only suitable commercially available 80 strand ribbon cable should be used Failure to do so may result in data transmission errors o...

Page 83: ...ts ability to attach a 3 5 IDE device or Inova IPM ATA Mass Storage Device without direct connection to the CPU base board This facilitates servicing and allows a CPU for example to be exchanged witho...

Page 84: ...2004 Inova Computers GmbH PageC 14 ICP P4 PM CMAppendix C ITM RIO Appendix C This page has been left blank intentionally...

Page 85: ...1 1b The Complete Connection Picture D 3 D1 2 IPM ATA HD D 4 Figure D1 2 IPM ATA HD Board Layout D 4 Table D1 2 IPM ATA HD Jumper Description CF Socket D 4 D1 3 IPM ATA CF D 5 Figure D1 3 IPM ATA CF B...

Page 86: ...A PCMCIA format mass storage capability D1 1 rJ2 Interface All IPM ATA modules possess rJ2 for data communication between the CompactPCI backplane and the mass storage unit s in question Figure D1 1a...

Page 87: ...hin the CompactPCI enclosure Figure D1 1b shows the complete configuration CompactPCI to IPM XXX Figure D1 1b The Complete Connection Picture KEY 1 IPM ATA carrier board 2 Dedicated backplane with sta...

Page 88: ...jumper positions for the various Master Slave device configurations Figure D1 2 IPM ATA HD Board Layout 1 2 3 Table D1 2 IPM ATA HD Jumper Description CF Socket It should be noted that the secondary...

Page 89: ...settings for the various Master Slave device configurations Figure D1 3 IPM ATA CF Board Layout 1 2 3 Table D1 3 IPM ATA CF Jumper Description It should be noted that the secondary IDE channel only f...

Page 90: ...ns Figure D1 4 IPM ATA PCMCIA Board Layout 1 2 3 Table D1 4 IPM ATA PCMCIA Jumper Description It should be noted that the secondary IDE channel only from rear I O is available for use by the IPM ATA P...

Page 91: ...t that Inova be contacted prior to commissioning Table D1 5 Compatibility List Note This module only supports ATA PCMCIA cards memory and cannot be used with WLAN modem GPS etc PCMCIA devices If one c...

Page 92: ...2004 Inova Computers GmbH PageD 8 ICP P4 PM CMAppendix D IPM ATA Appendix D This page has been left blank intentionally...

Page 93: ...E 5 Table E1 20 J4 Pinout Contd E 6 E1 3 J3 J5 IBP GS MULTILINK TFT Interfaces E 7 Figure E1 30 J3 and J5 Topside Connectors for the Inova IPB GS MULTILINK E 7 Table E1 30 J3 J5 Interface Pinout E 8...

Page 94: ...n indus trial automation engineering applications It is fabricated in 2 basic versions Analog VGA or digital DVI D TMDS Connectors J1 J3 and J5 are explained later in this section Table E1 00 AGP Pigg...

Page 95: ...5 C Humidity 5 to 95 non condensing 40 C Warranty Three year limited warranty 1 Two VGA monitors can be connected simultaneously with identical video information on both the Radeon graphics engine mus...

Page 96: ...discussed earlier is hardware configured at time of purchase for different front and rear panel modes refer to table E1 00 The TFT option J3 J5 is always present The J4 AGP interface on the graphic p...

Page 97: ...OUT 10 VCC5 11 INTB 12 SDATA_IN 13 GND 14 INTA 15 CLK 16 RST 17 REQ 18 GND 19 ST0 20 GNT 21 VCC3 3 22 ST1 23 ST2 24 25 RBF 26 VCC3 3 27 28 PIPE 29 GND 30 WBF 31 SBA0 32 SBA1 33 SBA2 34 GND 35 SB_STB 3...

Page 98: ...72 FRAME 73 DEVSEL 74 VDDQ1 5 75 76 TRDY 77 GND 78 STOP 79 PERR 80 PME 81 SERR 82 GND 83 C BE1 84 PAR 85 VDDQ1 5 86 AD15 87 AD14 88 AD13 89 AD12 90 VDDQ1 5 91 AD10 92 AD11 93 GND 94 AD9 95 AD8 96 C BE...

Page 99: ...yback This connection is made through connectors J3 and J5 on the upper side of the piggyback as shown in figure E1 30 Table E1 30 gives the pinout of these two connectors The settings of the DIP swit...

Page 100: ...1_R5 8 D5_B5 9 GND 9 GND 10 D22_R6 10 D6_B6 11 D23_R7 11 D7_B7 12 GND 12 GND 13 CLK 13 D8_G0 14 GND 14 D9_G1 15 DE 15 GND 16 GND 16 D10_G2 17 HSYNC 17 D11_G3 18 GND 18 GND 19 VSYNC 19 D12_G4 20 GND 20...

Page 101: ...omatically Figure E1 40 shows the VGA TMDS connector signals for the front panel D Sub connector and tables E1 40 to E1 42 show the connector pinout and DIP switch settings respectively Figure E1 40 S...

Page 102: ...ect This applies to the digital TMDS configuration only SW6 SW5 SW4 Resolution Comments OFF OFF OFF Disabled OFF OFF ON OFF ON OFF 800 x 600 OFF ON ON 1024 x 768 60Hz ON OFF OFF ON OFF ON ON ON OFF ON...

Page 103: ...the AGP piggyback is installed the VGA connector associated with the chipset graphic must be removed For this reason the AGP piggyback is NOT available as an accessory to be added as an after thought...

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