Application Kit TC2X5
Hardware Manual
Application Kit Information
User’s Manual
3-2
V 2.0, 2013-05
3.3
XGA Display
The board has an XGA Display with a resolution of 320x240. The display has an ILI932x
display controller. Please see the datasheet of the display controller for the register of
the controller. The display is connected to the the microcontroller via an SPI to Parallel
converter (U201).
The SPI to Parallel converter is based on a statemachine. This statemachine is clocked
with the clock of SPI, here SCLK0 (P20.11). Each rising edge of P20.11 will change the
state of statemachine. When SLSO08 (P20.6) is not low then the statemachine will go
always in the idle state.
3.3.1
Write a display register
A single write to any register can be done by a 32 bit transfer of SPI. Make sure that the
SLSO08 is low during this 32 bit. Bit 31 must be transfered first.
Bit 31 must be 0, this will be indicate a write access.
Bit 30 must be 0, this will be indicate a single access.
Bit 29...Bit 22 is the 8 bit register number which will be written
Bit 21...Bit 6 is the 16bit value which will be written
Bit 5...Bit 0 are dummy bits which are used to execute the write.
To speedup the writing (e.g. write to ram of display controller) it is possible to make a
endless transfer. This is done by this:
first 10 bit transfer
Bit 9 must be 0, this will be indicate a write access.
Bit 8 must be 1, this will be indicate an endless transfer.
Bit 7...Bit 0 is the 8 bit register number which will be written
Now you need to transfer only 16bit values for the registers. With the first 16 bit value
there is no action on the display. With the second value transfer is a write to the register
started. This means after the last value you must make a dummy transfer to write the last
value.
The endless mode can only be leave by a rising edge of SCLK0 with SLSO08 set to high.
This can be done by a dummy transfer to any other chip select or by a transfer from the
touch controller.
3.3.2
Read a display register
A single read from any register can be done by a 32 bit transfer of SPI. Make sure that
the SLSO08 is low during the complete transfer.
first transfer has 16 bit:
Bit 15 must be 1, this will be indicate a read access.
Downloaded by [email protected] 09/08/2019 14:06:40