Infineon OPTIREG TLS820D2ELVSE Manual Download Page 17

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Edition 2021-06-24
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Infineon Technologies AG
81726 Munich, Germany
 

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 2021 Infineon Technologies AG

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Document reference

IFX-Z8F61720705

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Summary of Contents for OPTIREG TLS820D2ELVSE

Page 1: ...dropout linear voltage regulators TLS820B2ELVSE TLS820D2ELVSE TLS835B2ELV TLS835B2ELVSE TLS835D2ELVSE in a PG SSOP 14 package from Infineon Technologies AG Intended audience This document is intended...

Page 2: ...for all variants 6 2 2 2 Jumper settings TLS820B2ELVSE TLS835B2ELVSE 7 2 2 3 Jumper settings TLS820D2ELVSE TLS835D2ELVSE 8 2 2 4 Jumper settings TLS835B2ELV 10 2 2 5 Signal access 11 3 Schematic and...

Page 3: ...ustable between 1 5 V and 6 V 200 mA or 350 mA current capability Output voltage accuracy 2 Ultra low current consumption typically 20 A Very low dropout voltage typical 100 mV at 100 mA Stable with c...

Page 4: ...fers the full feature set Bandgap Reference GND Q I Temperature Shutdown EN Enable Reset RO RADJ D Current Limitation SEL Figure 1 Block diagram of TLS835D2ELVSE OPTIREG linear voltage regulator TLS8x...

Page 5: ...D 0 0 V system GND 2 2 Demoboard configuration The TLS8xxx2ELVxx demoboard can be easily configured via jumpers on the board The board provides the following configuration options Input capacitor C1 X...

Page 6: ...function X8 Function EN VIN The regulator is enabled while the EN pin is connected to VIN EN GND The regulator is disabled while the EN pin is connected to GND open The EN input pin is supplied from t...

Page 7: ...Headers X10 X11 and X12 These headers are not relevant They can be set to open or as shown in Figure 2 Default setting of the jumpers TLS820B2ELVSE TLS835B2ELVSE Figure 2 shows the default setting of...

Page 8: ...default reset threshold RADJ DIV Sets a reset threshold between 2 V and 4 2 V for 5 V output voltage or between 2 V and 2 75 V for 3 3 V output voltage depending on the voltage divider R5 R6 The under...

Page 9: ...Figure 3 TLS820D2ELVSE TLS835D2ELVSE default jumper setting OPTIREG linear voltage regulator TLS8xxx2ELVxx demoboard Z8F61720705 Demoboard User manual 9 Rev 1 1 2021 06 24...

Page 10: ...e of the voltage divider then the resistors of the voltage divider must be implemented The value of the resistors can be easily calculated when neglecting the current flowing into the ADJ pin as follo...

Page 11: ...essible signal X13 GND ground X14 EN Enable input signal VIN input voltage GND ground GND ground X15 GND ground VD Reset delay setting RO Reset output signal RADJ Reset threshold setting SEL output vo...

Page 12: ...3 Schematic and layout 3 1 Schematic Figure 5 Schematic OPTIREG linear voltage regulator TLS8xxx2ELVxx demoboard Z8F61720705 Schematic and layout User manual 12 Rev 1 1 2021 06 24...

Page 13: ...3 2 Layout Figure 6 Top layer Figure 7 Bottom layer OPTIREG linear voltage regulator TLS8xxx2ELVxx demoboard Z8F61720705 Schematic and layout User manual 13 Rev 1 1 2021 06 24...

Page 14: ...ABU4MM VOUT banana jack BABU4MM GND banana jack BABU4MM RO banana jack BABU4MM R1 0 R0805 R2 R3 R4 n a R0805 C1 47 F 50 V SMD C2 100 nF 100 V C1206 C3 C7 1 F 16 V C0805 C4 n a C1206 C5 n a C0805 C6 10...

Page 15: ...roduct or finished appliance nor is it intended or authorized by Infineon to be integrated into end products The demoboard may not be used in any production system For further information please conta...

Page 16: ...tory Revision Date Changes 1 1 2021 06 24 TLS820D2ELVSE added 1 0 2018 05 15 Document created OPTIREG linear voltage regulator TLS8xxx2ELVxx demoboard Z8F61720705 Revision history User manual 16 Rev 1...

Page 17: ...nt is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements norms and standards concerning customer s products and any use of the product...

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