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Infineon MERUS MA2304DNS, User Manual

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Infineon MERUS MA2304DNS User Manual Download Page 23

  

 

User Manual 

23 

V 1.1  

 

 

2022-09-12 

User manual for MERUS™ audio amplifier configurato

r 

MA2304DNS/MA2304PNS 

Using the software 

   

3.2.4

 

Register browser page

 

The register browser contains detailed information about the many registers of the MA2304xNS. However, this 
should only be applied in rare cases where it is necessary to modify an uncommon setting. 

If it is necessary to modify some registers in the register browser, it is best to use the search function in the 
upper left corner to find the registers. 

Each row corresponds to a register address and/or group of bits. 

Changes on any checkbox   will be effective immediately (i.e., they will result in an I

2

C transaction) as long as 

there is connection with the MA2304xNS. 

 

Figure 35

 

Register browser page 

Search field 

 

Type a register name or phrase in the search field and press enter to search for content in the register map. If 
there is a match, the corresponding register row will be highlighted in blue.

 

 

Summary of Contents for MERUS MA2304DNS

Page 1: ... found quickly and easily by visiting the Class D Audio Amplifier IC Forum or by visiting community infineon com The community forum features members of the audio applications team that are ready to provide timely support helping you get your designs done quickly reliably and right the first time Safety precautions Note Please note the following warning regarding the hazards associated with develo...

Page 2: ... stages page 12 3 2 2 I2 S TDM page 14 3 2 3 DSP page 16 3 2 3 1 Example 1 EQ filter response plot 19 3 2 3 2 Example 2 Importing a custom speaker measurement and EQing 20 3 2 4 Register browser page 23 3 2 5 Status page 24 4 DSP flows 25 4 1 DSP flow application examples 26 4 1 1 5 W mono wireless speaker 26 5 DSP audio blocks 29 5 1 Biquad block 29 5 2 Volume control limiter block 37 5 2 1 Limit...

Page 3: ...I and DSP evaluation DC power supply 10 to 20 V DC 6 A for BTL mode or 10 to 20 V DC 12 A for PBTL mode Loudspeaker s 2 to 8 Ω speaker impedance Optional 2 to 8 Ω power resistor class D filter and audio analyzer 1 2 Hardware setup For quick and easy evaluation plug one of the interface boards into the J1 I O header on top of the MA2304xNS board as shown in Figure 1 Figure 1 Interface boards and MA...

Page 4: ... other options 1 3 Software installation The MERUS audio amplifier configurator can be downloaded by visiting https softwaretools infineon com and registering your board Once registered the software can be installed through the Infineon developer center launcher or downloaded as a separate installer file This will also install all the necessary device drivers to communicate with the MA2304xNS eval...

Page 5: ... coax or optical and keep it muted 4 Set the SW_ENABLE switch to ON and SW_MUTE to UNMUTE as shown in Figure 3 Figure 3 MA2304xNS ENABLE and MUTE switches At this point the MA2304xNS should be able to play audio Set the audio source to a low volume and unmute it Once the hardware is configured double click the MERUS audio amplifier configurator icon on your desktop to launch the application Figure...

Page 6: ...e To access advanced device features and DSP flows click the button and select the Configuration option Figure 6 Configuration dropdown menu The Configuration page should now appear This page provides access to advanced device features DSP flows device registers and status indicators Figure 7 Configuration page The following section describes the MERUS audio amplifier configurator in detail ...

Page 7: ...ilored for audio applications 2 1 Demo mode The MERUS audio amplifier configurator can run without having any board connected to the computer In this case the GUI will launch in demo mode as shown in Figure 8 This mode can be used to evaluate the software and build user configurations In this mode multiple MA2304xNS devices can be added as well by clicking the symbol on the bottom right of the win...

Page 8: ... MCU connected mode In this case there is still connection to the onboard MCU but not the amplifier This screen only contains a refresh button and a green connection light indicating that a connection is made with the onboard MCU If the connection light turns red it means that the MCU is not detected To go to the initial screen as shown in Figure 9 make sure that the amplifier is powered and its E...

Page 9: ... Initial screen The initial screen has various indicators and controls as shown in Figure 11 and Figure 12 The name and description of each are also provided in these figures Figure 11 Initial screen indicators To access advanced device features and DSP flows click the button and select the Configuration option Figure 12 Initial screen controls ...

Page 10: ...4 Enable or disable tooltips The MERUS audio amplifier configurator detects if multiple MA2304xNS are connected on the same I2 C bus and automatically stacks multiple instances of MA2304xNS devices similar to a rack mount This can be useful for systems with more than two speakers Figure 15 is an example of a 2 1 speaker system two speakers and a subwoofer The Speakers rack is configured as stereo ...

Page 11: ...window which is covered in the next section Save configuration saves the device state including register settings and DSP flow into a folder In addition it generates csv files which can be used to import into a product Export configuration creates a header file that can also be used to import into a product The Open configuration option is used to browse to a previously saved configuration folder ...

Page 12: ...on window provides access to device features DSP flows MA2304DNS only a register browser and real time status indicators These items are covered in detail in the following sections Figure 17 Configuration window 3 2 1 Power stages page Through the power stage page power mode profiles amplifier gain and drive strength can be configured Efficiency and THD N plots for each power mode profile are prov...

Page 13: ... profiles trade off between power consumption and output noise Amplifier gain control The amplifier gain is the relationship between a full scale input 0 dBFS and output voltage Vpeak Each one of these options has a recommended power supply voltage This control modifies the pvdd_scale register as shown in Table 2 Table 2 PVDD voltage guideline pvdd_scale Recommended PVDD voltage 00 10 V 01 12 V 10...

Page 14: ...tput out of the MA2304DNS it is necessary to enable the TX_ENABLE control and load a DSP program that supports this Figure 19 I2 S TDM page Audio interface format controls These controls are used to configure the audio interface format Refer to the device datasheet for details on audio interface format and timing The SLOT SIZE control affects the number of SCK cycles per channel The DATA SIZE cont...

Page 15: ... enables disables I2S_DO output data from the DSP The drive strength of the I2S_DO pin can also be configured through the TX_DRIVE_STRENGTH control Output slot controls Each output slot control corresponds to a TDM time slot In these output refers to Tx or I2S_DO data Each control can be configured to output Zeros High Z DSP Tx0 left channel or DSP Tx1 right channel On multichannel applications sl...

Page 16: ... a graphical view of the current DSP flow and a plot of the expected amplitude and phase responses with options for viewing single channels or combined responses Figure 20 DSP page Library button To select a DSP flow press the library button in the top right corner of the screen Sample rate control After loading a DSP flow please ensure that the sample rate selected in this control matches the sam...

Page 17: ...cking DSP flow diagram The DSP flow is a block diagram of interconnected audio blocks that can be programmed into the MA2304DNS DSP This screenshot shows the audio data flowing from the host applications processor MCU etc into the digital audio interface of the MA2304xNS through the DSP and its audio blocks to the power amplifier and to the speaker s If the TX_ENABLE control in the I2 S TDM page i...

Page 18: ...column phase is optional Frequency Hz Amplitude dB Phase deg Only numbers period and semicolon are allowed Comments or spaces are not supported Below are two examples with and without phase 10 98 20 5 98 7 50 100 3 100 100 7 200 98 2 500 96 7 1000 94 9 2000 96 8 5000 98 1 10000 99 5 20000 92 3 Figure 22 Frequency and amplitude csv file example 20 874025 82 843 49 7109 50 170902 101 811 177 9095 10...

Page 19: ...r measurement The summed response option can be useful to estimate the far field response of two way speakers ported speakers and so on 3 2 3 1 Example 1 EQ filter response plot Let s open a two channel flow and configure two left channel biquads as peaking filters parametric EQ as shown below Figure 24 Two cascaded biquads Now let s enable the Speaker_1 response and select the Amplitude option Fi...

Page 20: ...ock s Amplitude Then left click the desired biquad block Figure 28 Biquad block The plot will now display a combination of the first biquad response along with the overall DSP flow response Figure 29 Plot showing first biquad response and overall DSP flow response 3 2 3 2 Example 2 Importing a custom speaker measurement and EQing First double click the Speaker_1 icon and import the csv file of a s...

Page 21: ...lot Figure 31 Amplitude response plot We will now try to flatten the frequency response by configuring some biquads an EQ cut a bass shelf and a low pass filter Figure 32 Configure biquads A left click on the bass shelf filter reveals its contribution to the frequency response on the graph A shelf filter response with a 15 dB cut below 1 kHz is shown in light blue Figure 33 Frequency response grap...

Page 22: ...S audio amplifier configurator MA2304DNS MA2304PNS Using the software A left click on the Speaker_1 icon reveals the unmodified speaker response light blue along with the flattened response darker blue for comparison Figure 34 Speaker response comparison ...

Page 23: ...ify some registers in the register browser it is best to use the search function in the upper left corner to find the registers Each row corresponds to a register address and or group of bits Changes on any checkbox will be effective immediately i e they will result in an I2 C transaction as long as there is connection with the MA2304xNS Figure 35 Register browser page Search field Type a register...

Page 24: ...warnings and errors can be monitored Figure 36 Status page Real time active indicators These indicators show active warnings and errors as an orange or red light Accumulated sticky indicators These warnings or errors will be shown as a colored circle around the indicator Clear button Press the CLEAR button to clear previous states of the warning or error indicators ...

Page 25: ...own in the screenshot below the DSP page block diagram is comprised of hardware level blocks MA2300 blocks and a DSP flow In addition the DSP flow itself contains interconnected DSP audio blocks Figure 37 DSP page block diagram To select a DSP flow press the library button in the top right corner of the screen A Library window will then appear as shown in Figure 38 below Figure 38 Library window ...

Page 26: ...For smaller speakers a biquad configured as a high pass filter is recommended to allow more flexibility with release times EQing is highly dependent on the speaker enclosure and configuration For small single driver speakers EQing is mostly focused on flattening and or matching a target response improving bass and voice intelligibility and solving some acoustic driver resonance issues The biquads ...

Page 27: ...he speaker power rating In smaller speaker systems intelligibility and loudness become important and therefore additional techniques such as limiting and compression may be used to achieve this purpose To select a power supply voltage and or amplifier gain we first calculate the equivalent RMS and peak voltages expected when the speaker is driven near its rated power levels First let s calculate t...

Page 28: ...dio tuning as well as the speaker characteristics and reliability tests A summary of the limiter calculations is shown in the worksheet table below Table 5 Limiter worksheet Parameter Parameter Value Unit P1 Continuous power handling 5 W P2 Short term power handling 20 W Znom Nominal impedance 4 Ω V1 RMS voltage corresponding to P1 4 5 Vrms V2 Peak voltage corresponding to P2 12 6 Vpeak GdB Amplif...

Page 29: ...rner frequency and gain can be adjusted A typical DSP flow has multiple of these biquad blocks interconnected in cascade Double clicking a biquad block opens a biquad configuration window as shown below Figure 42 Biquad configuration window Each biquad filter option has its own parameters to choose from For example a low pass filter has the option to select the filter subtype and its cut off frequ...

Page 30: ... represents one of many analog prototype filters The single pole filter option has a 20 dB decade roll off while the second order filter options have a 40 dB decade roll off and so on Using a single pole high pass filter e g less than 50 Hz is recommended to avoid any offset artifacts A fourth order filter requires the user to configure two consecutive biquad blocks For example if a fourth order L...

Page 31: ...ype Analog filter prototypes Frequency Low pass high pass cut off fc frequency 10 1000 Fs 2 Hz Q value1 Filter quality factor Affects frequency response and damping in time domain 0 5 1 10 0 1 Q value only available in 2nd order custom subtype Below is an example measurement of a second order Linkwitz Riley filter crossover Figure 43 Second order Linkwitz Riley filters fc 300 Hz left channel blue ...

Page 32: ...lue Table 7 Parametric EQ filter controls Control name Description Min Default Max Unit Frequency The center frequency f0 where the amplitude peak is observed 10 1000 Fs 2 Hz Gain The peak amplitude 48 1 24 dB Q value The filter quality factor 0 010 1 10 0 An example family of EQ curves with varying gain settings f0 3 kHz and Q 2 is shown below Figure 44 EQ filters with 9 3 0 5 0 5 3 and 9 dB gain...

Page 33: ...higher frequency band is boosted cut The shelf filters have two controls frequency and gain Table 8 Shelf filter controls Control name Description Min Default Max Unit Frequency The frequency f0 in which the amplitude is half the gain difference between the boosted and unboosted region in dB 10 1000 Fs 2 Hz Gain The peak amplitude of the filter 48 1 24 dB An example family of shelf filter curves w...

Page 34: ...ch filter has two controls Frequency and Q value as shown below Table 9 Notch filter controls Control name Description Min Default Max Unit Frequency The notch center frequency f0 10 1000 Fs 2 Hz Q value The filter quality factor 0 1 1 10 0 An example family of notch filter curves with f0 1 kHz and Q 1 2 and 3 is shown below Figure 46 Notch filters with f0 3 kHz and Q 1 2 and 3 As shown in this ex...

Page 35: ...inator As shown in the previous image the biquad transfer function is defined as 𝐻 𝑧 𝑏0 𝑏1𝑧 1 𝑏2𝑧 2 𝑎0 𝑎1𝑧 1 𝑎2𝑧 2 Each coefficient and its range is defined in Table 10 below Table 10 Custom filter controls Control name Description Min Default Max a0 Denominator coefficient Typically set to 1 while other coefficients normalized by a0 0 0 10 a1 Denominator coefficient 0 0 10 a2 Denominator coeffici...

Page 36: ...9 12 User manual for MERUS audio amplifier configurator MA2304DNS MA2304PNS DSP audio blocks Figure 47 Custom EQ filters with 9 dB gain f0 3 kHz and Q 1 2 and 3 In this example a higher Q results in a narrower peak and vice versa ...

Page 37: ...ely useful in audio applications from driving loudspeakers within its rated power keeping the amplifier IC temperature controlled to making music and voice sound louder and more intelligible 5 2 1 Limiter configuration Double clicking the volume limiter block opens its configuration window as shown in Figure 49 This window shows the peak and RMS limiter options as well a pre gain and volume source...

Page 38: ...st case Setting stereo linking to on on both left and right channels will configure both limiters to compress by the same amount Table 12 Stereo linking control Control name Description Min Default Max Stereo linking1 Compares the channel volume attenuation to the opposite channel attenuation and limits according to the worst case Off Off On 1 Needs to be applied to both left and right channels if...

Page 39: ...ables or disables the limiter Off Off On Threshold The input level in which limiting begins 481 3 24 dBFS Attack time The time period it takes for the limiter to attenuate by 10 dB Peak 0 2 128 ms 10 dB RMS 16 128 2048 ms 10 dB Release time The time period it takes for the limiter to increase gain by 10 dB Peak 16 128 2048 ms 10 dB RMS 128 1024 16384 ms 10 dB 1 The limiters have a maximum attenuat...

Page 40: ...n of the full scale level 0 dBFS and the full scale voltage Remember that any adjustment to the full scale voltage e g pvdd_scale setting will change the voltage limit at the output This is especially important when limiting the output based on loudspeaker power handling specifications and or IC temperature Figure 50 shows an input output plot showing the effects of the pre gain and threshold para...

Page 41: ...t signal changes to a smaller waveform below the threshold it is then amplified over a period of time release phase back to its original gain level unity gain Figure 51 Limiter waveform example time domain The limiter block can be configured as a peak limiter and as an RMS limiter In the case of a peak limiter its level detector follows the peak level of the input signal instead of the RMS or aver...

Page 42: ...y Typical music content has a large crest factor peak to RMS ratio which can be used as an advantage when using limiters by preserving the music dynamic range and keeping long term signals e g sine tones controlled Lastly in the case of an RMS limiter its level detector follows the RMS level of the input signal Measuring proper RMS levels require several periods of sampling which by design is not ...

Page 43: ... the following example let s assume that the input waveform is a full scale 0 dBFS sinewave pre gain 0 dB With both limiters combined the peak limiter can be configured as a brickwall limiter and at the same time have the RMS limiter settings more relaxed This is shown in Figure 56 This can be especially useful to prevent harsh clipping when applying high levels of pre gain to make the music loude...

Page 44: ...tput limiters to shape the sound of the speaker system The output limiters are most useful to keep IC temperature and speaker power in check Once these safety mechanisms are in place the DRCs can then be tuned in any way without the worry of exceeding these limits 5 3 1 Two band DRC configuration Double clicking the two band DRC block opens its configuration window as shown in Figure 58 This windo...

Page 45: ... a percentage above the threshold as well as attack and release times The attack time is the time it takes the compressor to decrease gain by 10 dB Similarly the release time is the time it takes the compressor to increase gain by 10 dB Table 15 Two band DRC controls Control name Description Min Default Max Unit Threshold The input level in which compression begins Low pass band 48 24 24 dBFS High...

Page 46: ...ulti band crossover frequencies and DRC options for the low pass mid pass and high pass frequency bands A frequency response and input output plots are shown for each DRC band as well Figure 59 Three band DRC configuration window Band1 and band2 frequency controls The Band1 and Band2 frequency controls adjust the crossover frequency between each of the three DRC bands Second order Linkwitz Riley f...

Page 47: ... time it takes the compressor to decrease gain by 10 dB Similarly the release time is the time it takes the compressor to increase gain by 10 dB Table 17 Three band DRC controls Control name Description Min Default Max Unit Threshold The input level in which compression begins Low band 48 0 24 dBFS Mid band 48 0 24 dBFS High band 48 0 24 dBFS Compression The compression ratio above the threshold k...

Page 48: ...ion ratio between 1 1 and inf 1 is possible This enables subtler compression as the signal level increases The graph in Figure 60 is an input output plot showing several compression ratios As an example a 50 percent compression 2 1 ratio shows a 10 dB output level increase per 20 dB of input signal above the threshold Input level dB Output level dB 20 40 20 40 0 0 100 inf 1 threshold 75 4 1 50 2 1...

Page 49: ...z The low band is configured for heavy compression 100 percent and a 20 dBFS threshold Little compression is applied to the mid band while the high band is configured for 75 percent compression Figure 62 shows a frequency sweep of this configuration At a 20 dBFS input level the response is flat As the input level is increased to 15 dBFS a reduction on the low band can be observed Compression on th...

Page 50: ...le clicking the delay block open its configuration window as shown below Figure 64 Delay configuration window The delay block has a maximum delay of 860 samples across all sample rates At 44 1 kHz sampling this is equivalent to a maximum of 19 5 ms Table 18 Delay block control Control name Description Min Default Max Unit Samples Number of samples to delay 0 0 860 Samples Delay Delay time in ms 0 ...

Page 51: ...2 09 12 User manual for MERUS audio amplifier configurator MA2304DNS MA2304PNS DSP audio blocks The plot below shows a one sample delay applied to the left channel Figure 65 One sample delay 0 02 ms applied to the left channel ...

Page 52: ...can be useful for mono applications such as Bluetooth speakers subwoofers and so on Double clicking the MIXMUX block opens its configuration window as shown below Figure 67 MIXMUX configuration window The input source is derived from the RX_0 and RX_1 controls available in the I2 S TDM configuration page Input 0 left input 1 right or a mix of inputs 0 and 1 can be selected as an option for each ou...

Page 53: ...me Description Options Default Output 0 Output channel 0 left source Input 0 Input 1 Input mix Input 0 Output 1 Output channel 1 right source Input 0 Input 1 Input mix Input 1 Output 21 Output channel 2 source Input 0 Input 1 Input mix Input 0 Output 31 Output channel 3 source Input 0 Input 1 Input mix Input 1 1 Available in four channel audio flows only ...

Page 54: ...figurations The save configuration options store register DSP flow and GUI settings in a folder for later use The files within this folder can be useful for debugging purposes as well Clicking save configuration as will prompt for a configuration name and location as shown in Figure 69 Figure 69 Save configuration window To load a previously saved configuration click the open configuration button ...

Page 55: ...aved configuration Each csv file has two columns The first column is the I2 C register address Keep in mind that the MA2304xNS registers use a 2 byte address format The second column is the corresponding 1 byte data Below is an example of a xxx_all csv file 0x0 0x34 0x1 0x3 0x2 0x0 0x3 0x20 0x4 0x20 0x5 0x2 0x6 0x0 Figure 71 xxx_all csv snippet Below is an example of a xxx_dsp csv file 0x1000 0x11...

Page 56: ... generates several files Figure 73 Files generated when exporting a configuration The following table provides a description of each of the generated files Table 21 Export configuration files Filename Description output Contains the entire DSP program and data memory registers output h Contains both the DSP code and device register settings output_flowchart json Contains the DSP flow corresponding...

Page 57: ...0 0x1050 0x0000 uint16_t DATA_CODE DATA_PACK_SIZE 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 Figure 74 output h DSP code snippet The REG_ADDRESS_X and REG_DATA_X macros are defined at the end of the file define REG_ADDRESS_1 0x00bd define REG_DATA_1 0x0012 define REG_ADDRESS_2 0x00be define REG_DATA_2 ...

Page 58: ...rite_code PROGRAM_MEM_ADDR PROGRAM_CODE PROGRAM_PACK_SIZE amp_write_code DATA_MEM_ADDR DATA_CODE DATA_PACK_SIZE amp_write REG_ADDRESS_1 REG_DATA_1 amp_write REG_ADDRESS_2 REG_DATA_2 amp_mute false return 0 int amp_write_code uint16_t addr uint16_t code uint16_t size int i 0 Split 16 bit register address into bytes uint8_t i2c_buffer Temporary storage i2c_buffer addr 8 0xff Register address MSB i2c...

Page 59: ...MA2304PNS Revision history Revision history Document revision Date Description of changes V 1 0 2022 08 26 Initial release V 1 1 2022 09 12 Updated document title to MERUS audio amplifier configurator Renamed software name throughout the document accordingly Added software download instructions ...

Page 60: ...n given in this application note The data contained in this document is exclusively intended for technically trained staff It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application lt in personal injury WARNINGS Duetotech...

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