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Infineon Cypress EZ-BLE CYBLE-022001-00 Manual Download Page 23

CYBLE-022001-00

Document Number: 001-95662 Rev. *N

Page 22 of 41

Serial Communication

Table 28.  Fixed I

2

C DC Specifications

Table 30.  Fixed UART DC Specifications

Table 31.  Fixed UART AC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

I

I2C1

Block current consumption at 100 kHz

–

–

50

µA

–

I

I2C2

Block current consumption at 400 kHz

–

–

155

–

I

I2C3

Block current consumption at 1 Mbps

–

–

390

–

I

I2C4

I

2

C enabled in Deep-Sleep mode

–

–

1.4

–

Table 29.  Fixed I

2

C AC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

F

I2C1

Bit rate

–

–

400

kHz

–

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

I

UART1

Block current consumption at 100 kbps

–

–

55

µA

–

I

UART2

Block current consumption at 1000 kbps

–

–

312

–

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

F

UART

Bit rate

–

–

1

Mbps –

Table 32.  Fixed SPI DC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

I

SPI1

Block current consumption at 1 Mbps

–

–

360

µA

–

I

SPI2

Block current consumption at 4 Mbps

–

–

560

–

I

SPI3

Block current consumption at 8 Mbps

–

–

600

–

Table 33.  Fixed SPI AC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

F

SPI

SPI operating frequency (master; 6x over sampling)

–

–

8

MHz

–

Table 34.  Fixed SPI Master Mode AC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

T

DMO

MOSI valid after SCLK driving edge

–

–

18

ns

–

T

DSI

MISO valid before SCLK capturing edge Full clock, 

late MISO sampling used

20

– 

–

Full clock, late MISO sampling

T

HMO

Previous MOSI data hold time 

0

–

–

Referred to Slave capturing 

edge

Table 35.  Fixed SPI Slave Mode AC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

T

DMI

MOSI valid before SCLK capturing edge

40

–

– 

ns

–

T

DSO

MISO valid after SCLK driving edge

– 

– 

42 + 3 × T

CPU

–

T

DSO_ext

MISO Valid after SCLK driving edge in external 

clock mode. V

DD

 < 3.0 V

–

–

50

–

T

HSO

Previous MISO data hold time

0

–

–

–

T

SSELSCK

SSEL valid to first SCK valid edge

100

– 

–

–

Summary of Contents for Cypress EZ-BLE CYBLE-022001-00

Page 1: ...ers as part of the Infineon product portfolio Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document Future revisions will occur when appropriate and any changes will be set out on the document history page Continuity of ordering part numbers Infineon continues to support existing pa...

Page 2: ... 005 101007 KC ID MSIP CRM Cyp 2001 Bluetooth SIG 5 1 qualified QDID 141250 Declaration ID U048555 Power Consumption TX output power 18 dbm to 3 dbm Received signal strength indicator RSSI with 1 dB resolution TX current consumption of 15 6 mA radio only 0 dbm RX current consumption of 16 4 mA radio only Low power mode support Deep Sleep 1 3 µA with watch crystal oscillator WCO on Hibernate 150 nA...

Page 3: ...etooth LE Test and Debug Tool Android iOS Mobile App Two Easy To Use Design Environments to Get You Started Quickly PSoC Creator Integrated Design Environment IDE PSoC Creator is an Integrated Design Environment IDE that enables concurrent hardware and firmware editing compiling and debugging of PSoC 3 PSoC 4 PSoC 5LP PSoC 4 Bluetooth LE and EZ BLE module systems with no code size limitations PSoC...

Page 4: ...em Forum See if your question is already answered by fellow developers on the PSoC 4 Bluetooth LE forum Visit our support page and create a technical support case or contact a local sales representatives If you are in the United States you can talk to our technical support team by calling our toll free number 1 800 541 4736 Select option 2 at the prompt ...

Page 5: ...pherals 20 Serial Communication 22 Memory 23 System Resources 23 Environmental Specifications 28 Environmental Compliance 28 RF Certification 28 Safety Certification 28 Environmental Conditions 28 ESD and EMI Protection 28 Regulatory Information 29 FCC 29 ISED 30 European R TTE Declaration of Conformity 30 MIC Japan 31 KC Korea 31 Anatel Brazil 32 Packaging 33 Ordering Information 35 Part Numberin...

Page 6: ...omponent area are maintained Designs should be held within the physical dimensions shown in the mechanical drawings in Figure 1 All dimensions are in millimeters mm Table 1 Module Design Dimensions See Figure 1 on page 6 for the mechanical reference drawing for CYBLE 022001 00 Dimension Item Specification Module dimensions Length X 10 00 0 15 mm Width Y 10 00 0 15 mm Antenna location dimensions Le...

Page 7: ...wing Bottom View Seen from Bottom Side View Top View See from Top Note 1 No metal should be located beneath or above the antenna area Only bare PCB material should be located beneath the antenna area For more information on recommended host PCB layout see Recommended Host PCB Layout on page 8 ...

Page 8: ... corner This placement minimizes the additional recommended keep out area stated in item 2 Refer to AN96841 for module placement best practices 2 To maximize RF performance the area immediately around the Cypress Bluetooth LE module chip antenna should contain an additional keep out area where no grounding or signal traces are contained The keep out area applies to all layers of the host board The...

Page 9: ...unless otherwise noted Pad length of 0 91 mm 0 455 mm from center of the pad on either side shown in Figure 6 is the minimum recommended host pad length The host PCB layout pattern can be completed using either Figure 4 Figure 5 or Figure 6 It is not necessary to use all figures to complete the host PCB layout pattern Figure 4 Host Layout Pattern for CYBLE 022001 00 Figure 5 Module Pad Location fr...

Page 10: ...nsion from Orign mils 1 0 26 1 64 10 24 64 57 2 0 26 2 41 10 24 94 88 3 0 26 3 17 10 24 124 80 4 0 26 3 93 10 24 154 72 5 0 26 4 69 10 24 184 65 6 0 81 9 74 31 89 383 46 7 1 57 9 74 61 81 383 46 8 2 34 9 74 92 13 383 46 9 3 10 9 74 122 05 383 46 10 3 86 9 74 151 97 383 46 11 4 62 9 74 181 89 383 46 12 5 38 9 74 211 81 383 46 13 6 15 9 74 242 13 383 46 14 6 91 9 74 272 05 383 46 15 7 67 9 74 301 97...

Page 11: ...SDA TCPWM Sensor 17 P3 7 SCB1_CTS TCPWM Sensor 18 P1 4 SCB0_RX SCB0_MOSI SCB0_SDA TCPWM Sensor 19 P1 5 SCB0_TX SCB0_MISO SCB0_SCL TCPWM Sensor 20 P3 6 SCB1_RTS TCPWM Sensor 21 P4 0 6 SCB1_RTS SCB1_MOSI TCPWM0_P CMOD Notes 2 TCPWM stands for timer counter and PWM If supported the pad can be configured to any of these peripheral functions 3 TCPWM connections on ports 0 1 2 and 3 can be routed throug...

Page 12: ...ct VDD and VDDR to the same supply 2 Independent supply Power VDD and VDDR separately External Component Recommendation In either connection scenario it is recommended to place an external ferrite bead between the supply and the module connection The ferrite bead should be positioned as close as possible to the module pin connection Figure 7 details the recommended host schematic options for a sin...

Page 13: ...CYBLE 022001 00 Document Number 001 95662 Rev N Page 12 of 41 The CYBLE 022001 00 schematic is shown in Figure 9 Figure 9 CYBLE 022001 00 Schematic Diagram ...

Page 14: ...heet The Cypress module performance improves many of these characteristics For more information see Table 8 Table 6 Chip Antenna Specifications Component Reference Designator Description Silicon U1 68 pin WLCSP PSoC 4 Bluetooth LE Crystal Y1 24 000 MHz 10PF Crystal Y2 32 768 kHz 12 5PF Antenna E1 2 4 2 5 GHz chip antenna Item Description Chip Antenna Manufacturer Johanson Technology Inc Chip Anten...

Page 15: ... Absolute maximum IGPIO_ABS Maximum current per GPIO 25 25 mA Absolute maximum IGPIO_injection GPIO injection current Maximum for VIH VDD and minimum for VIL VSS 0 5 0 5 Absolute maximum current injected per pin LU Pin current for latch up 200 200 Parameter Description Min Typ Max Units Details Conditions RFO RF output power on ANT 18 0 3 dBm Configurable via register settings RXS RF receive sensi...

Page 16: ... VDD 1 71 V to 1 89 V Regulator Bypassed IDD19 WDT with WCO on µA T 25 C IDD20 WDT with WCO on T 40 C to 85 C Hibernate Mode VDD 1 8 V to 3 6 V IDD27 GPIO and reset active 150 nA T 25 C VDD 3 3 V IDD28 GPIO and reset active T 40 C to 85 C Hibernate Mode VDD 3 6 V to 5 5 V IDD29 GPIO and reset active nA T 25 C VDD 5 V IDD30 GPIO and reset active T 40 C to 85 C Stop Mode VDD 1 8 V to 3 6 V IDD33 Sto...

Page 17: ...t VDD 2 7 V 2 0 VIL Input voltage LOW threshold 0 3 VDD CMOS input LVTTL input VDD 2 7 V 0 3 VDD LVTTL input VDD 2 7 V 0 8 VOH Output voltage HIGH level VDD 0 6 IOH 4 mA at 3 3 V VDD Output voltage HIGH level VDD 0 5 IOH 1 mA at 1 8 V VDD VOL Output voltage LOW level 0 6 IOL 8 mA at 3 3 V VDD Output voltage LOW level 0 6 IOL 4 mA at 1 8 V VDD Output voltage LOW level 0 4 IOL 3 mA at 3 3 V VDD RPUL...

Page 18: ...5 pF load 60 40 duty cycle FGPIOIN GPIO input operating frequency 1 71 V VDD 5 5 V 48 90 10 VIO Table 13 OVT GPIO DC Specifications P5_0 and P5_1 Only Parameter Description Min Typ Max Units Details Conditions IIL Input leakage absolute value VIH VDD 10 µA 25 C VDD 0 V VIH 3 0 V VOL Output voltage LOW level 0 4 V IOL 20 mA VDD 2 9 V Table 14 OVT GPIO AC Specifications P5_0 and P5_1 Only Parameter ...

Page 19: ...in Typ Max Units Details Conditions A_RES Resolution 12 bits A_CHNIS_S Number of channels single ended 6 6 full speed 9 A CHNKS_D Number of channels differential 3 Diff inputs use neighboring I O 9 A MONO Monotonicity Yes A_GAINERR Gain error 0 1 With external reference A_OFFSET Input offset voltage 2 mV Measured with 1 V VREF A_ISAR Current consumption 1 mA A_VINS Input voltage range single ended...

Page 20: ...V to VDD A_dnl Differential nonlinearity VDD 1 71 V to 5 5 V 1 Msps 1 2 2 VREF 1 V to VDD A_DNL Differential nonlinearity VDD 1 71 V to 3 6 V 1 Msps 1 2 VREF 1 71 V to VDD A_DNL Differential nonlinearity VDD 1 71 V to 5 5 V 500 Ksps 1 2 2 VREF 1 V to VDD A_THD Total harmonic distortion 65 dB FIN 10 kHz CSD Block Specifications Parameter Description Min Typ Max Units Details Conditions VCSD Voltage...

Page 21: ...2 TCLK TTENWIDEXT Enable pulse width external 2 TCLK TTIMRESWINT Reset pulse width internal 2 TCLK TTIMRESEXT Reset pulse width external 2 TCLK Table 22 Counter DC Specifications Parameter Description Min Typ Max Units Details Conditions ICTR1 Block current consumption at 3 MHz 42 µA 16 bit counter ICTR2 Block current consumption at 12 MHz 130 ICTR3 Block current consumption at 48 MHz 535 Table 23...

Page 22: ...LEXT Kill pulse width external 2 TCLK TPWMEINT Enable pulse width internal 2 TCLK TPWMENEXT Enable pulse width external 2 TCLK TPWMRESWINT Reset pulse width internal 2 TCLK TPWMRESWEXT Reset pulse width external 2 TCLK Table 26 LCD Direct Drive DC Specifications Parameter Description Min Typ Max Units Details Conditions ILCDLOW Operating current in low power mode 17 5 µA 16 4 small segment display...

Page 23: ... Description Min Typ Max Units Details Conditions ISPI1 Block current consumption at 1 Mbps 360 µA ISPI2 Block current consumption at 4 Mbps 560 ISPI3 Block current consumption at 8 Mbps 600 Table 33 Fixed SPI AC Specifications Parameter Description Min Typ Max Units Details Conditions FSPI SPI operating frequency master 6x over sampling 8 MHz Table 34 Fixed SPI Master Mode AC Specifications Param...

Page 24: ...C 10 K P E cycles 10 Table 38 POR DC Specifications Parameter Description Min Typ Max Units Details Conditions VRISEIPOR Rising trip voltage 0 80 1 45 V VFALLIPOR Falling trip voltage 0 75 1 40 VIPORHYST Hysteresis 15 200 mV Table 39 POR AC Specifications Parameter Description Min Typ Max Units Details Conditions TPPOR_TR Precision power on reset PPOR response time in Active and Sleep modes 1 µs T...

Page 25: ...I10 LVI_A D_SEL 3 0 1001b 2 54 2 60 2 67 VLVI11 LVI_A D_SEL 3 0 1010b 2 63 2 70 2 77 VLVI12 LVI_A D_SEL 3 0 1011b 2 73 2 80 2 87 VLVI13 LVI_A D_SEL 3 0 1100b 2 83 2 90 2 97 VLVI14 LVI_A D_SEL 3 0 1101b 2 93 3 00 3 08 VLVI15 LVI_A D_SEL 3 0 1110b 3 12 3 20 3 28 VLVI16 LVI_A D_SEL 3 0 1111b 4 39 4 50 4 61 LVI_IDD Block current 100 µA Table 43 Voltage Monitor AC Specifications Parameter Description M...

Page 26: ...2 kHz 0 3 1 05 µA Table 48 ILO AC Specifications Parameter Description Min Typ Max Units Details Conditions TSTARTILO1 ILO startup time 2 ms FILOTRIM1 32 kHz trimmed frequency 15 32 50 kHz Parameter Description Value Details Conditions ECOTRIM 24 MHz trim value firmware configuration 0x00009898 Recommended trim value that needs to be loaded to register CY_SYS_XTAL_BLERD_BB_XO_CAPTRIM_REG Table 50 ...

Page 27: ...ted signal at 67 dBm and Interferer at F 2484 2997 MHz 35 27 RF PHY Specification RCV LE CA 04 C OBB4 Out of band blocking Wanted signal a 67 dBm and Interferer at F 3000 12750 MHz 30 27 RF PHY Specification RCV LE CA 04 C IMD Intermodulation performance Wanted signal at 64 dBm and 1 Mbps Bluetooth LE third fourth and fifth offset channel 50 RF PHY Specification RCV LE CA 05 C RXSE1 Receiver spuri...

Page 28: ...tting PA7 16 5 ITX_RF 0dBm Radio TX current at 0 dBm setting PA7 15 6 Measured at VDDR ITX_RF 0dBm Radio TX current at 0 dBm excluding Balun loss 14 2 Guaranteed by design simulation ITX 3dBm TX current at 3 dBm setting PA4 15 5 ITX 6dBm TX current at 6 dBm setting PA3 14 5 ITX 12dBm TX current at 12 dBm setting PA2 13 2 ITX 18dBm TX current at 18 dBm setting PA1 12 5 Iavg_1sec 0dBm Average curren...

Page 29: ...th LE module Table 51 Environmental Conditions for CYBLE 022001 00 ESD and EMI Protection Exposed components require special attention to ESD and electromagnetic interference EMI A grounded conductive layer inside the device enclosure is suggested for EMI and ESD performance Any openings in the enclosure near the module should be surrounded by a grounded conductive layer to provide ESD protection ...

Page 30: ...outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help LABELING REQUIREMENTS The Original Equipment Manufacturer OEM must ensure that FCC labelling requirements are met This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Cypress Semiconductor FCC identifier for thi...

Page 31: ... Operation is subject to the following two conditions 1 this device may not cause interference and 2 this device must accept any interference including interference that may cause undesired operation of the device Cet appareil est conforme à la norme sur l innovation la science et le développement économique ISED norme RSS exempte de licence L exploitation est autorisée aux deux conditions suivant...

Page 32: ...hat integrate CYBLE 022001 00 do not need additional MIC Japan certification for the end product End product can display the certification label of the embedded module KC Korea CYBLE 022001 00 is certified for use in Korea with certificate number MSIP CRM Cyp 2001 Model Name EZ BLE PRoC Module Part Number CYBLE 022001 00 Manufactured by Cypress Semiconductor 005 101007 ...

Page 33: ...CYBLE 022001 00 Document Number 001 95662 Rev N Page 32 of 41 Anatel Brazil CYBLE 022001 00 has type approval in Brazil with identification number 06800 19 11443 Módulo CYBLE 022001 00 ...

Page 34: ...orientation of the CYBLE 022001 00 in the tape as well as the direction for unreeling Figure 11 Component Orientation in Tape and Unreeling Direction Table 52 Solder Reflow Peak Temperature Module Part Number Package Maximum Peak Temperature Maximum Time at Peak Temperature No of Cycles CYBLE 022001 00 21 pad SMT 260 C 30 seconds 2 Table 53 Package Moisture Sensitivity Level MSL IPC JEDEC J STD 2 ...

Page 35: ...l dimensions used for the CYBLE 022001 00 Figure 12 Reel Dimensions The CYBLE 022001 00 is designed to be used with pick and place equipment in an SMT manufacturing environment The center of mass for the CYBLE 022001 00 is detailed in Figure 13 Figure 13 CYBLE 022001 00 Center of Mass ...

Page 36: ...ooth LE products contact your local Cypress sales representative To locate the nearest Cypress office visit our website Table 54 Ordering Information Part Number CPU Speed MHz Flash Size KB CapSense SCB TCPWM 12 Bit SAR ADC I2 S LCD Package Packing CYBLE 022001 00 48 128 Yes 2 4 1 Msps Yes Yes 21 SMT Tape and Reel Table 55 Tape and Reel Package Quantity and Minimum Order Amount Description Minimum...

Page 37: ... integrated design environment KC Korea Certification MIC Ministry of Internal Affairs and Communications Japan PCB printed circuit board RX receive QDID qualification design ID SMT surface mount technology a method for producing electronic circuitry in which the components are placed directly onto the surface of PCBs TCPWM timer counter pulse width modulator PWM TUV Germany Technischer Überwachun...

Page 38: ... BLE Creator Module Replaced terms pre certified with certified and pre qualified with qualified respectively in all instances across the document Updated General Description Updated Module Description Updated description Added hyperlinks in required places Updated Power Consumption Updated description Updated Functional Capabilities Updated description Updated Electrical Specification Updated Tab...

Page 39: ...e 3 to provide the location to the center of each solder pad from the origin in mm and mils Added Figure 6 to provide the location to the center of each solder pad from the origin in mm and mils Updated Electrical Specification Updated XRES Added Temperature Sensor Added SAR ADC Added CSD Updated Digital Peripherals Added Timer Added Counter Added Pulse Width Modulation PWM Added LCD Direct Drive ...

Page 40: ...pdated Figure 13 changed orientation to match PSoC Creator F 5421822 09 02 2016 Updated More Information Updated description Updated hyperlinks Updated Electrical Specification Updated System Resources Updated Internal Low Speed Oscillator Updated Table 49 Updated details in Value column corresponding to ECOTRIM parameter Updated Environmental Specifications Added Safety Certification Updated Orde...

Page 41: ...nmental Compliance Updated description Updated Regulatory Information Updated ISED Updated description Updated Ordering Information No change in part numbers Updated Part Numbering Convention L 6612217 07 03 2019 Updated Regulatory Information Updated European R TTE Declaration of Conformity Replaced 1999 5 EC with 2014 53 EU Updated to new template M 6958640 09 02 2020 Updated General Description...

Page 42: ... liability arising out of the application or use of any product or circuit described in this document Any information provided in this document including any sample design information or programming code is provided only for reference purposes It is the responsibility of the user of this document to properly design program and test the functionality and safety of any application made of this infor...

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