User’s Manual
4-6
05.99
External Bus Interface
C513AO
4.5
ROM/OTP Protection
The C513AO-2R ROM version allows protection of the content of the internal ROM against read out
by unauthorized people. The type of ROM protection (protected or unprotected) is fixed with the
ROM mask. Therefore, users of the C513AO-2R ROM version device must predefine whether ROM
protection is to be selected or not.
The C513AO-2E OTP version also allows program memory protection in several levels (see
Chapter 10.6). The program memory protection for the C513AO-2E can be activated after
programming of the device.
The C513AO-2R devices, which operate from internal ROM, are always checked for correct ROM
content during production test. Therefore, both unprotected and protected ROMs must provide a
procedure to verify the ROM content. In ROM Verification Mode 1, which is used to verify
unprotected ROMs, a ROM address is applied externally to the C513AO-2R and the ROM data byte
is output at Port 0. ROM Verification Mode 2, which is used to verify ROM protected devices,
operates differently: ROM addresses are generated internally and the expected data bytes must be
applied externally to the device (by the manufacturer or by the customer) and are compared
internally with the data bytes from the ROM. After 16 byte-verify operations, the state of the P3.5
pin shows whether the last 16 bytes have been verified correctly.
This mechanism provides very secure ROM protection. Only the owner of the ROM code and the
manufacturer who knows the content of the ROM can verify it.
4.5.1 Unprotected ROM Mode
If the ROM is unprotected, ROM Verification Mode 1, shown in Figure 4-3, is used to read out the
content of the ROM. (See also the AC Specifications in the Data Sheet; not valid for C513AO-2E).
Figure 4-3
ROM Verification Mode 1
ROM Verification Mode 1 is selected if the inputs PSEN, ALE, EA, and RESET are put to the
specified logic level. P2.6 and P2.7 must be held at low level. Whenever the 14-bit address of the
internal ROM byte to be read is applied to Port 1 and Port 2, Port 0 outputs the content of the
addressed internal program memory cell after a delay time. In ROM Verification Mode 1, the
C513AO-2R must be provided with a system clock at the XTAL pins and pull-up resistors on the
Port 0 lines.
MCD04196
Inputs : PSEN, P2.6 =
SS
V
ALE =
V
IH
RESET =
V
IH1
Address
Data OUT
P1.0-P1.7
P2.0-P2.5
Port 0
P2.7
EA =
IH2
V
