Memory Organization
C513AO
User’s Manual
3-4
05.99
3.4.3 Accesses to XRAM using the Registers R0/R1 (8-bit Addressing Mode)
The C513AO architecture provides instructions for accesses to external data memory and XRAM
which use an 8-bit address (indirect addressing with Registers R0 or R1). These instructions are:
– MOVX
A, @Ri
(Read)
– MOVX
@Ri, A
(Write)
Using these instructions with the XRAM disabled implies that Port 0 is used as the address/data
bus, Port 2 is used for high address output, and two lines of Port 3 (P3.6/WR, P3.7/RD) are used
for control. Normally, these instructions are used to access 256-byte pages of external memory.
If the XRAM is enabled, these instructions will only access the internal XRAM. External memory
cannot be accessed in this case because no external bus cycle will be generated. Therefore Ports
0, 2, and 3 can be used as standard I/O, if only the internal XRAM is used.
