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Application Note 

20 of 45 

001-84858 Rev. *N 

 

 

2021-03-23 

PSoC 4 Programming Using an External Microcontroller (HSSP) 

 

Power Cycle Mode Programming 

8

 

Power Cycle Mode Programming

 

Device programming starts with a device reset to acquire the device and enter programming mode. The 
recommended method of resetting the device from the host side is to toggle the device XRES pin. But some 
lower pin count devices in the PSoC 4000 family do not have an XRES pin, and the host has to toggle the device 
V

dd

 pin to reset the device (power cycle mode). All the projects provided with the application note work using 

the XRES programming mode because the PSoC 5LP host processor on the development kit does not have the 
hardware connections to toggle the power supply of the target PSoC 4 device. So, when porting the projects to 
your host processor and adding power cycle mode support, the following changes and considerations need to 
be made in the project. 

1.

 

The DEVICE_ACQUIRE_TIMEOUT value, discussed in the section 

DEVICE_ACQUIRE_TIMEOUT

has to be 

modified to reflect the much longer 30-ms timeout window required for power cycle mode programming. 
So, for example, if the DEVICE_ACQUIRE_TIMEOUT define has been calculated to be 20 for a 2 ms XRES 
mode acquire timing, then that define should be changed to 300 for a 30 ms power cycle mode acquire 
timing. 

2.

 

The function definitions related to toggling of the XRES pin on the host side should be modified as 
appropriate to toggle the device power rails. These functions are - 

SetXresHigh(),SetXresLow().

 

3.

 

If an I/O pin of the host processor is used to power the PSoC 4 device directly to toggle the power from the 
host side, ensure that the I/O pin can source the current required for device operation as specified in the 
respective PSoC 4 device datasheet. If the I/O pin is not able to source the required current, the output 
voltage (V

OH

) typically decreases, and can potentially go even below the minimum PSoC 4 device operating 

voltage. This can cause programming failures. Such a voltage droop scenario can be identified by observing 
the power rail voltages on the oscilloscope. 

Summary of Contents for AN84858

Page 1: ...code examples web page You can also explore the video training library here Table of contents About this document 1 Table of contents 1 1 Introduction 3 1 1 Types of Programmers 3 1 2 Terms and Defin...

Page 2: ...cts 32 14 Appendix A Hex File Parser Application 33 14 1 Using the Hex File Parser Application 33 14 2 Adding the Generated Files to PSoC Creator Example Project 34 14 2 1 Using the HexImage c HexImag...

Page 3: ...on the end application PCB You can connect the external programmer to the device s programming pins to do in system programming Socket programmers require the target device to be placed on the progra...

Page 4: ...the host programmer Differences between bootloading and HSSP In embedded systems bootloaders are also used to update the system firmware Bootloading and HSSP differ in the following key aspects Bootlo...

Page 5: ...interface I2 C SPI UART or USB or host flash as Figure 1 shows In addition the HSSP Programming Step layer uses the HSSP Timeout Parameters interface to configure timeouts in its programming APIs Host...

Page 6: ...constitute the SWD Protocol Packet layer are described Table 2 SWD Protocol Packet Layer Files Source Files Description SWD_PacketLayer c and h files These files define the packet routines for sending...

Page 7: ...nding flash protection 4 Checksum Privileged Calculation After all the user rows are erased this step calculates the checksum of the privileged rows which is used to verify the checksum of the user ro...

Page 8: ...ls on the hex file format see Appendix B Intel Hex File Format in the programming specifications document of the respective device listed in the Related Documentation section of this document For host...

Page 9: ...iption 2 0 SWD ACK These three bits store the acknowledge response of previous SWD transactions 3 SWD Read Data Parity Error If this bit is set it indicates a parity error in the data received by the...

Page 10: ...ation section of this document Figure 3 shows the basic hardware connection required between the host programmer and the target device Host Programmer PSoC 40xx VDD VDDD SWDCK XRES SWDIO GND SWDCK P3...

Page 11: ...ge h HexImage c DataFetch h DataFetch c ProgrammingSteps h ProgrammingSteps c RegisterDefines h 4 2 Code Changes Required While Porting Make the following changes to each of the files while porting th...

Page 12: ...et the programming data In such a case remove these files DataFetch c The definitions for the functions should be modified based on the method used to get the programming data See Interface for Receiv...

Page 13: ...Acquire in the ProgrammingSteps c file To program the device the device must be acquired within the maximum time window for acquiring the device after you do a device reset using the XRES pin Maximum...

Page 14: ...SROM polling operations during HSSP programming It is used while polling the result of the nonvolatile memory read and write operations through SROM requests in the target device When the host request...

Page 15: ...ne In the HSSP code a pulse width of 100 s is generated on the XRES pin The function TestDelayHundredUs is defined in the TimeoutCalc c file In the C_Hssp_TimeoutCalc project provided with the applica...

Page 16: ...yDelayUs API For microcontrollers other than PSoC as the host programmer the XRES_PULSE_100US parameter has to be defined in Timeout h and the delay should be implemented using this parameter in the D...

Page 17: ...ce such as SPI USB or UART to get the programming data Also all the function definitions in the DataFetch c file should be modified appropriately The following example is a reference that shows the mo...

Page 18: ...18 of 45 001 84858 Rev N 2021 03 23 PSoC 4 Programming Using an External Microcontroller HSSP Interface for Receiving HSSP Programming Data for i 0 i BYTES_PER_FLASH_ROW i rowData i PLACE THE UART BU...

Page 19: ...SWD Interface of the programming specifications document of the respective device listed in the Related Documentation section The host programmer must meet the timing parameters specified for the SWD...

Page 20: ...ACQUIRE_TIMEOUT value discussed in the section DEVICE_ACQUIRE_TIMEOUT has to be modified to reflect the much longer 30 ms timeout window required for power cycle mode programming So for example if the...

Page 21: ...hex file included by default in this project toggles pin P1 6 of PSoC 4 at 1 Hz frequency and displays PSoC Programmed on the character LCD mounted on the CY8CKIT 001 DVK after a successful programmin...

Page 22: ...2 4 P12 4 P12 4 P12 4 To test this project follow these steps 1 Prepare the B_Hssp_Pioneer project a Generate the files containing the programming data HexImage c HexImage h for your target PSoC 4 dev...

Page 23: ...eer Kit and the location of the status LED and reset switch Figure 6 PSoC 4 Pioneer Kit 3 Bootload the HSSP project to PSoC 5LP a Open the bootloader host tool Choose Tools Bootloader Host in PSoC Cre...

Page 24: ...les are not signed Ignore the warning and proceed Now the USBUART driver is installed on your machine 5 Use HyperTerminal to start HSSP programming a Open HyperTerminal on your computer If you do not...

Page 25: ...the B_Hssp_Pioneer cyacd project to PSoC 5LP via USB to be used as an HSSP host programmer This project uses a USB to UART Component to display the programming outputs on HyperTerminal which is a sta...

Page 26: ...tion note and select KitProg2_Bootloader hex for the Bootloader HEX file field The Bootloader ELF file will be automatically generated on selecting the Bootloader HEX file Figure 10 Bootloadable Depen...

Page 27: ...USBUART drivers do the following a Open Device Manager Make sure USBUART is present in the Other devices list b Double click the USBUART entry to open its properties c Click Update Driver d Select the...

Page 28: ...the terminal displays the step and error code that you can use to debug the project Figure 13 Terminal Display 6 Reprogram PSoC 5LP with the kit firmware a Open PSoC Programmer b Enter the bootloader...

Page 29: ...step of the HSSP Device Acquire has strict timing requirements with regards to entering the programming mode One of the important requirements is to ensure that the frequency of SWDCK clock line is a...

Page 30: ...ion is useful for developing in system programming solutions for PSoC 4 devices It provides a cheap and robust method for programming PSoC 4 devices using an onboard embedded microcontroller as a host...

Page 31: ...pecifications CY8C41XX CY8C42XX Programming Specifications CY8C4000 Programming Specifications 12 3 Architecture Technical Reference Manuals PSoC 4000 Family PSoC 4 Architecture Technical Reference Ma...

Page 32: ...ogramming specifications document of the respective device listed in the Related Documentation section B_Hssp_Pioneer This is the PSoC 4 HSSP application project for testing on the PSoC 4 Pioneer Kit...

Page 33: ...s The programming data is stored as an array of constants in the HexImage c and HexImage h files The C application with the source code is provided along with the application note To use the C applica...

Page 34: ...t folder location 3 After selecting the hex file and the target folder location click Parse Hex File to generate the c and h files After parsing is complete a message is displayed 14 2 Adding the Gene...

Page 35: ...are selected the Workspace Explorer window appears as follows Figure 17 Project Workspace showing HexImage c and HexImage h Files If you need to replace these files in the project with those correspon...

Page 36: ...the programming data corresponding to the last few flash rows is deleted from the HexImage c and HexImage h files The corresponding logic has also been incorporated in the HEX_ReadRowData function in...

Page 37: ...ve PSoC 4 Architecture Technical Reference Manuals TRM listed in the Related Documentation section Table 12 Error Status Codes and Reason for Failure Status Code 32 Bit Value in CPUSS_SYSARG Register...

Page 38: ...al Microcontroller HSSP Appendix B Status Codes for SROM Request Status Code 32 Bit Value in CPUSS_SYSARG Register Description 0xF0000012 Invalid Flash Clock The CY8C40xx family of devices must set th...

Page 39: ...e host during the previous SWD write packet Any other code Undefined code Treat this as a FAULT response All the responses except the OK ACK response require that the host abort the HSSP operation and...

Page 40: ...the Cortex M0 DAP ID 0x0BB11477 Verify Silicon ID Step 2 Silicon ID Verification Error Silicon ID information in the hex file does not match the Silicon ID read from the target device Verify Flash St...

Page 41: ...high impedance digital input drive mode SetXresHizInput Configures the host XRES pin for high impedance digital input drive mode ReadSwdio Returns the current state of the SWDIO input pin Table 16 Fun...

Page 42: ...ay The byte size of the protection data is also passed as a parameter to this function HEX_ReadChipProtectionData Copies the chip protection data from the HexImage c file to an indicated destination H...

Page 43: ...her the checksum data read from the target device matches the hex file checksum data ExitProgrammingMode Exits the target device programming mode by generating an active LOW pulse signal on the XRES p...

Page 44: ...CKIT 046 I 2015 12 30 Updated the example projects to PSoC Creator 3 3 SP1 J 2017 03 23 AN updated to support PSoC 4000S PSoC 4100S and PSoC Analog Coprocessor Modified Figure 3 to include PSoC 4000S...

Page 45: ...note The data contained in this document is exclusively intended for technically trained staff It is the responsibility of customer s technical departments to evaluate the suitability of the product...

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