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Page 1: ...Application Note V 1 0 Feb 2004 82C900 Standalone TwinCAN Controller Microcontrollers AP29002 N e v e r s t o p t h i n k i n g...
Page 2: ...gn updated release to 1 0 Content unchanged 82C900 We Listen to Your Comments Any information within this document that you feel is wrong unclear or missing at all Your feedback will help us to contin...
Page 3: ...MATION GIVEN IN THIS APPLICATION NOTE Information For further information on technology delivery terms and conditions and prices please contact your nearest Infineon Technologies Office www infineon c...
Page 4: ...82C900 with SSC interface 2 3 2 Using the parallel interface of the 82C900 2 3 3 Hardware Gateway functionality 2 3 4 Normal Gateway Mode 2 3 5 Shared Gateway 2 3 6 Stand Alone mode 2 3 7 SPI Master M...
Page 5: ...greatly improves the real time behavior of the system The device provides built in automatic gateway functionality for data exchange between both CAN buses minimizing the CPU s message handling load T...
Page 6: ...frame count time stamp per message object Analyzing mode Parallel and serial interface Can be configured via external serial EEPROM Clock output pin Power saving features 28 pin P DSO package Temperat...
Page 7: ...nection and disconnection of bus nodes e g node for software upgrade bus monitoring The bus logic corresponds to a wired AND mechanism recessive bits are overwritten by dominants bits As long as no bu...
Page 8: ...if a node wants to transmit a message it checks first that the bus is in the idle state Carrier Sense If this is the case the node becomes the bus master and sends its message If many nodes start thei...
Page 9: ...0 with SSC interface The SSC interface provides an economical way to connect the 82C900 to a microcontroller The SSC interface is developed by Infineon and is 100 SPI compatible Basically there are on...
Page 10: ...r Infineon Microcontrollers such as the C161PI If you want to use the Phytec C161O KitCon board the board needs to be connected with wires because P3 4 of the KitCon board is used for other functions...
Page 11: ...transfer data width is 8 bit transfer receive MSB first shift transmit data on the leading clock edge latch on trailing edge idle clock line is high leading clock edge is high to low transition ignor...
Page 12: ...fer register with PAGE register address while SSCRIR wait for end of transmission while RDY 0 wait for RDY 1 82C900 is ready SSCRIR 0 reset receive interrupt request SSCTB PageNumber load transmit buf...
Page 13: ...ta load transmit buffer register with Data while SSCRIR wait for end of transmission while RDY 0 wait for RDY 1 82C900 is ready SLS 1 set SLS 1 communication sequence end First the four MSB bits are e...
Page 14: ..._READMASK mask for read SLS 0 set SLS 0 new communication sequence while RDY 0 wait for RDY 1 82C900 is ready SSCRIR 0 reset receive interrupt request SSCTB StartAddress load transmit buffer register...
Page 15: ...the CAN message to the transmit object and transmits it on the same CAN node The source code for this example is in the SSC directory of the code for this ApNote void main void Project_Init SLS 1 sla...
Page 16: ...e MSG_OBJ_BASE 0 MSGCFGn 2 0x01 trigger interrupt node 1 when receiving message SSC_SendByte MSG_OBJ_BASE 0 MSGCTRn 1 0xF7 set MSGLST to 01 reset SSC_SendByte MSG_OBJ_BASE 0 MSGCTRn 0xFB set RXIE rece...
Page 17: ...MSGCTRn 0x7F set MSGVAL to 01 reset SSC_SendByte MSG_OBJ_BASE 1 MSGCTRn 0xFD set INTPND to 01 reset SSC_SendByte MSG_OBJ_BASE 1 MSGCTRn 1 0x7F set RMTPND to 01 reset SSC_SendByte MSG_OBJ_BASE 1 MSGCTR...
Page 18: ...OBJ_BASE 1 MSGCTRn 1 0xFB set CPUUPD SSC_SendByte MSG_OBJ_BASE 1 MSGDRn0 databuffer put data into transmit message object SSC_SendByte MSG_OBJ_BASE 1 MSGCTRn 1 0xF7 reset CPUUPD SSC_SendByte MSG_OBJ_B...
Page 19: ...xed bus and 4 control signals ALE CS WR and RD for an Infineon compatible parallel bus Figure 4 Schematic for the parallel data transfer In this example the C167CR is used as the host microcontroller...
Page 20: ...gured for a long read access by setting bit LAE in the GLOBCTR Register to 1 default 0 Configurations for the CS3 signal on the C167CR For this example a 4K memory window with start address 0x200000 i...
Page 21: ...re 5 Keil Linker Settings for SROM section The PR _ACS section must be defined as an SROM section in the User Sections text box In this example the section PR P_ACS and the class P_ACS_SOURCE are assi...
Page 22: ...at is copied into the IRAM pragma RENAMECLASS NCODE P_ACS_SOURCE read data from adr unsigned char P_Read byte adr unsigned char ret _atomic_ 1 no interrupts during transfer IEN 0 disable interrupts re...
Page 23: ...te PAGE 0x00ff unsigned char startaddress 7 0x0E set Pagenumber A10 A7 P_Write startaddress 0x00FF 1 unsigned char data 8 0x00FF write data into 82C900 RAM P_Write startaddress 0x00FF unsigned char da...
Page 24: ...Parallel_init SROM_PS P_ACS define variables copy functions into IRAM hmemcpy SROM_PS_TRG P_ACS SROM_PS_SRC P_ACS SROM_PS_LEN P_ACS P_SendByte GLOBCTR 0x17 long read access OUT0 and OUT1 INTout init M...
Page 25: ...e MSGOBJ INT into account P_SendWord node BIMR0 AIMR0 INT help else help P_ReadByte node BIMR0 AIMR0 3 8 help P_ReadByte node BIMR0 AIMR0 2 INT INT msg_obj 0x10 P_SendWord node BIMR0 AIMR0 2 INT help...
Page 26: ...the MSGOBJ data P_SendWord MSG_OBJ_BASE msg_obj MSGCTRn 0xFB7F inhibit transmission P_SendnBytes msg_dat data bt_nr transmit new data to the MSGOBJ P_SendWord MSG_OBJ_BASE msg_obj MSGCTRn 0xE6BD Read...
Page 27: ...iguration message object 1 transmits the data 0x55 0xAA with the ID 0x0001 on node B The message is received by message object 0 at node A Interrupt CC10INT pin 2 10 of C167CR is triggered from INT0 O...
Page 28: ...aut IMC ist taken into account void init_NodeA void P_SendByte ACR 0x41 set bit CCE in ACR P_SendByte ABTR 0x02 set DIV8X 0 TSEG2 3 TSEG1 4 SJW 1 BRP 2 P_SendByte ABTR 1 0x23 set DIV8X 0 TSEG2 3 TSEG1...
Page 29: ...END USER CODE BEGIN Main 2 Parallel_init set GLOBCTR of the 82C900 Project_Init init_NodeA init node A init_NodeB init node B init_MSG 0 0 0 2 0x0001 MSG0 is a receive OBJ Node A 2 Databytes init_INT...
Page 30: ...mote frames from one Node at a time So it can happen that a message on CAN Bus A gets lost without any detection during the time the gateway waits for a remote frame on CAN Bus B 3 4 Normal Gateway Mo...
Page 31: ...n SSC_SendByte ACR 0x00 clear INIT CCE in ACR setup CAN node B 125 KBaud SSC_SendByte BCR 0x41 set bit CCE in BCR SSC_SendByte BBTR 1 0x23 set DIV8X 0 TSEG2 3 TSEG1 4 SSC_SendByte BBTR 0x17 set SJW 0...
Page 32: ...ndByte MSG_OBJ_BASE 0 MSGCTRn 1 0x7F set RMTPND to 01 reset SSC_SendByte MSG_OBJ_BASE 0 MSGCTRn 1 0xDF set TRXQ to 01 reset SSC_SendByte MSG_OBJ_BASE 0 MSGCTRn 1 0xFD set NEWDAT to 01 reset SSC_SendBy...
Page 33: ...de B message objekt 1 transmitting to CAN node B normal gateway remoteframes copied to node A SSC_SendByte MSG_OBJ_BASE 1 MSGCTRn 0x7F set MSGVAL to 01 reset SSC_SendByte MSG_OBJ_BASE 1 MSGCTRn 0xFD s...
Page 34: ...m the source object MMC 100 Object is set to normal gateway mode SDT 0 No single data transfer The message object stays valid after a successful data transfer CANPTR 0x00 Message object 0 is the sourc...
Page 35: ...it for the next message So all remote frames on the destination side will get lost The source code files for this application are in the shared_gateway directory Table 6 Settings for the MSGFGCR Regis...
Page 36: ...ACR 0x41 set bit CCE in ACR P_SendByte ABTR 0x02 set BRP 2 P_SendByte ABTR 1 0x23 set DIV8X 0 TSEG2 3 TSEG1 4 SJW 1 P_SendByte AIMR0 0x01 take IMC0 into acount for INTID gen P_SendByte ACR 0x00 clear...
Page 37: ...cfg 0x0500 obj_nr 0x1F set MMC 101 and CANPTR to obj_nr P_SendWord MSG_OBJ_BASE obj_nr MSGFGCRn 2 cfg cfg 0x0000 reset FSIZE IDC DLCC if GDFC cfg 0x0100 automatic transmission on destinationsite if SR...
Page 38: ...eed to be configured via SPI EEPROM 3 7 SPI Master Mode If the mode pins are both high during reset the 82C900 works as master for a SPI data transfer So it can be easily connected to an SPI compatibl...
Page 39: ...P33 Open JP38 All open JP39 3 7 closed 1 2 open 8 open JP40 All open The Table 8 shows the EEPROM data for configuring CAN Node A 1Mbaud and Message object 0 as the configuration object for the initia...
Page 40: ...41 1 Data byte 0x41 0x0200 ACR set Init and CCE Node ready for configurations 0x0003 0x 42 0x 0C 0x 02 0x 23 2Databyte 0x2302 0x020C ABTR set Node A to 1MBaud 0x0007 0x 22 0x 18 0x 01 1 Data byte 0x02...
Page 41: ...code is 0xAA 0x0011 0x 23 0x 14 0x 72 1 Data byte 0x0314 MSGCFG0 Messageobject0 is receiving object of Node A with 7 Data bytes 0x0014 0x 23 0x 0A 0x 0C 1 Data byte 0x030A MSGAR0 2 Object identifier 3...
Page 42: ...lowing sequence will configure the second Node for 125 KBaud and 2 more message objects so that 82C900 will work as unidirectional gateway between the two CAN Busses Figure 11 82C900 after the initial...
Page 43: ...03 0x 34 0x 10 MSGCFG1 0x0334 MSGOBJ belongs to Node A receiving object 1 Data byte 0xAA 0x 03 0x 2A 0x 08 MSGAR1 2 set MSGOBJ ID 2 0xAA 0x 03 0x 38 0x 00 0x 0D 0x 02 0x 04 MSGFGCR1 0x0318 object in...
Page 44: ...transmitting object It transmits the value of INREG as the first byte of the message if TXRQ is set to 10 e g via SPI or with a matching remote frame So it is possible to communicate easily with conn...
Page 45: ...terrupt of MSG0 triggers EX2IN of the C167CR The interrupt routine reads out P2 4 P2 7 and writes the data to P2 0 P2 3 Now the contents of INREG can be read out with a remote frame with the ID 2 INMS...
Page 46: ...SSC_SendByte AIMR0 0x01 take IMC0 into acount for INTID generation SSC_SendByte ACR 0x00 clear INIT CCE in ACR configures MSGOBJ obj_nr for node with the direction dir id and by_nr data bytes void SS...
Page 47: ...E 0 MSGCFGn 2 0x00 SSC_SendByte MSG_OBJ_BASE 0 MSGCTRn 0xF9 configuring the IO pins 1 4 Input 5 8 Output SSC_SendByte IOMODE0 0x00 0 1 standard input SSC_SendByte IOMODE0 1 0x00 2 3 standard input SSC...
Page 48: ...he 82C900 starter kit must be configured as described in the chapter for the parallel interface The connections between the 82C900 and the C167CR are similar to the connections of the shared gateway e...
Page 49: ...ect the FIFO Buffer is related to node and has the direction dir and id FD MSGFGCRn is independent from dir and all objects has an 11 bit identifier and by_nr databytes void init_FIFO int base char FS...
Page 50: ...f the FIFO Buffer with the base object base the data can be transmitted automatically if remote is 0 else it waits for remote frames addressing the FIFO returns zero if their is no free object in the...
Page 51: ...1 obj base next i FSIZE 1 P_ReadByte MSG_OBJ_BASE obj 1 MSGCTRn 03 2 i calculate next OBJ obj base next i 1 FSIZE 1 take last OBJ with new data if P_ReadByte MSG_OBJ_BASE obj 1 MSGCTRn 03 2 return 1...
Page 52: ...ich MSGOBJ SendData 0 data 4 P_SendByte MSG_OBJ_BASE obj MSGCTRn 0xFD reset INTPND P_SendByte AIR 0x00 force INTPND to update IEN 1 USER CODE END void main void USER CODE BEGIN Main 1 unsigned char da...
Page 53: ...frame but the CANPTR will be incremented It can happen that some data is sent twice if the number of received remote frames is bigger than the number of MSGOBJs in the FIFO If the base object is inval...
Page 54: ...of the destination buffer and CANPTR must be initialized with the object number of the base object of the destination buffer The following example configures message object zero as the source object...
Page 55: ...ead FSIZE of Buffer cfg FSIZE 0x001F if IDC cfg 0x0400 ID is copied if DLCC cfg 0x0800 DLC is copied if GDFS cfg 0x0100 automatic transmition P_SendWord MSG_OBJ_BASE obj MSGCTRn 0xFF7F OBJ invalid P_S...
Page 56: ...he possibility to use a FIFO Buffer as source object So you need to use it only as destination object And it is also not possible to forward remote frames from the destination side to the source side...
Page 57: ...Down Mode the clock stops working and it can only be woken up by a RESET The Modes can be entered in different ways One way is the direct configuration in the CLKCTR register via Parallel Interface T...
Page 58: ...p modes CANAWU actA and CANBWU actB void sleep char actA char actB char cfg cfg P_ReadByte CLKCTR 0x30 if actA cfg 0x01 wakeup on MSG at A if actB cfg 0x02 wakeup on MSG at B P_SendByte CLKCTR cfg set...
Page 59: ...h t t p w w w i n f i n e o n c o m Published by Infineon Technologies AG...
