XC2200 Derivatives
System Units (Vol. 1 of 2)
System Control Unit (SCU)
User’s Manual
6-68
V2.1, 2008-08
SCU, V1.13
6.4
External Service Request (ESR) Pins
The ESR pins serve as multi-functional pins for an amount of different options:
•
Act as reset trigger input
•
Act as reset output
•
Act as trap input
•
Act as wake-up trigger for a power saving mode
•
Act as trigger input for the GSC
•
Overlay with other product functions
•
Independent pad configuration
6.4.1
General Operation
Each ESR pin is equipped with an edge detection that allows the selection of the edges
used as triggers. One, both, or no edge can be selected via bit field ESRCFGx.AEDCON
if no clock is active in the power domain DMP_M (see
), and
ESRCFGx.SEDCON if a clock is active in the power domain DMP_M. Additionally, there
is a digital (3-stage median) filter (DF) to suppress spikes. The signal at ESRx pin has to
be held at the active signal level for at least 2 system clock cycles (
f
SYS
) in order to
generate a trigger. If the power domain DMP_M is not clocked then the filter is not taken
into account. The digital filter can be disabled by clearing bit ESRCFGx.DFEN.
Each ESRx pin can be individually configured.
If an ESR trigger is generated please note that triggers for all purposes (reset, trap, PSC,
GSC, and non SCU module functions) are generated. If some of the actions resulting out
of such a trigger should not occur this has to be disabled by each feature for its own.
The pins that should be used as trigger input for an ESR operation have to be configured
as input pin.
