TC1796
System Units (Vol. 1 of 2)
Peripheral Control Processor (PCP)
User’s Manual
11-126
V2.0, 2007-07
PCP, V2.0
More details about the parity control for on-chip memories are described in
on
11.14.3
PCP Reset Operation
The PCP module can be reset by two ways:
•
By a system hardware signal (hard reset)
•
By programming of a PCP register bit (soft reset)
PCP Hard Reset
A PCP hard reset is always triggered if at least one of these TC1796 reset sources
becomes active:
•
Watchdog Timer Reset
•
Software Reset
•
Hardware Reset
•
Power-on Reset
Each of these reset sources forces a hardware reset of the functional blocks within the
PCP module. The effect of hard reset within the PCP is to:
•
Halt any operating channel
•
Reset all control registers to their reset values
•
Reset the PCP Processor Core to its default state
•
Reset the FPI Bus interface
PCP Soft Reset
A PCP soft reset is generated by writing a 1 to bit PCP_CS.RST (see also
A PCP soft reset differs from the PCP hard reset in that the interrupt system is not reset.
Specifically, all PCP interrupt nodes with their service request control registers are not
completely reset, and the PICU is also not affected.
The PCP soft reset is adopted to prevent loss of synchronization between any interrupt
node and the Arbitration Unit (ICU) to which it is connected due to one, but not the other
unit is reset. The effect of PCP soft reset is to:
•
Halt any operating channel
•
Reset all control registers (except PCP_SRCx registers) to their reset values
•
PCP_SRCx registers: clear all SRR and RRQ bits and leave all other bits unchanged
•
Reset the PCP Processor Core to its default state
•
Reset the FPI Bus interface
•
Clear all SRR and RRQ bits in all PCP_SRCx registers (all other bits are unchanged)
Note: The PCP soft reset is a useful hardware support feature in a PCP debugging
environment. It has been included for backward compatibility with PCP version 1.
However, generation of a PCP soft reset may be critical because it may cause a
