TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual
24-226
V2.0, 2007-07
GPTA, V2.0
The LTC input multiplexer contains LTC input Multiplexer Groups (LIMGs) that connect
the I/O groups or the clock, PDL, or INT inputs to the input lines of the LTCs, organized
in eight LTC groups with 8 cells each. IOGs are grouped into five IOGs (IOG[4:0]) with
eight lines each. Two special groups are available, a clock group with eight lines
representing the clock bus inputs CLK[7:0] and a PDL/INT group with eight outputs that
combines the four PDL inputs and the four inputs INT[3:0] as a group of LIMGs inputs.
shows the logical structure of a LIMG.
Figure 24-81 LTC Input Multiplexer Group (LIMG) Structure
Rules for connections to LTC Input Multiplexer Group LIMG:
•
Within a I/O group, the line or the output of the cell with the lowest index number is
connected to LIMG input line IN0. The remaining lines, cells or lines of a group are
connected to LIMG input lines IN1 to IN7 with ascending index numbers. At the clock
group, CLK0 is connected to IN0 and the remaining clock lines are connected to
LIMG input lines IN1 to IN7 with ascending index numbers. At the PDL/INT group,
PDL[3:0] (see
) are connected to IN[3:0] and INT[3:0] are connected to
IN[7:4].
Example: for LIMG04 (see
), the I/O lines of IOG0 (IN00 up to IN07) are
wired to its input lines IN0 to line IN7.
•
Multiplexer output OUT0 of a LIMG is always connected to the input of an LTC group
with the lowest index. The remaining output lines OUT1 to OUT7 are connected to
the LTC inputs with ascending index.
Example: for LIMG04 (see
), the outputs OUT0 to OUT7 are wired to
the inputs of LTC32 to GTC39.
MCA05990
From other LIMGs
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
Outputs of an
I/O Group or
CLK Group or
PDL/INT Group
To other
LIMGs
OU
T
0
OU
T
1
OU
T
2
OU
T
3
OU
T
4
OU
T
5
OU
T
6
OU
T
7
To LTC Groups
More than one switch
might be closed per row,
only one switch can be
closed per column
