Infineon Technologies TC1784, User Manual

Page: 669 / 2350

TC1784
Peripheral Control Processor (PCP)
User´s Manual 10-4 V1.1, 2011-05
PCP, V2.09
10.3.1 PCP Processor
The PCP Processor is the main engine of the PCP. It contains an instruction pipeline, a
set of GPRs, an arithmetic/logic unit (ALU), as well as control and status registers and
logic. Its instruction set is optimized especially for the tasks it has to perform.
Table 22
provides an overview of the PCP instruction set.
The PCP Processor Core receives service requests from peripherals or other modules
in the system via its PCP Interrupt Control Unit (PICU) and executes a channel program
(see
Page 8 ) selected via the priority number of each service request. It first restores the
channel program’s context from the PRAM and then starts to execute the channel
program’s instructions stored in the Code Memory (CMEM). Upon an exit condition, it
terminates the channel program and saves its context into PRAM. It is then ready to
receive the next service request.
The PCP Processor Core is capable of suspending execution of a Channel Program on
receipt of a service request with a higher priority than the channel currently being
executed. The Core will automatically resume processing of the original Channel
Program once the higher-priority request (or requests) has been processed. A channel
that has been suspended in this way is termed as “Suspended Channel”.
The PCP is fully interrupt-driven, meaning it is only activated through service requests;
there is no main program running in the background as with a conventional processor.
Table 22 PCP Instruction Set Overview
Instruction Group Description
DMA Primitives Efficient DMA channel implementation
Load/Store Transfer data between PRAM or FPI memory and the GPRs,
as well as move or exchange values between registers
Arithmetic Add, subtract, compare and complement
Divide/Multiply Divide and multiply
Logical And, Or, Exclusive Or, Negate
Shift Shift right or left, rotate right or left, prioritize
Bit Manipulation Set, clear, insert, and test bits
Flow Control Jump conditionally, jump long, exit
Miscellaneous No operation, Debug