
QUICK START GUIDE
EPC – THE LEADER IN GaN TECHNOLOGY |
| COPYRIGHT 2019 | | 2
EPC9060/61
Table 1: Performance Summary (T
A
= 25 °C) EPC9060/61
Symbol
Parameter
Conditions
Min
Max
Units
V
DD
Gate Drive Input Supply Range
7
12
V
V
IN
Bus Input Voltage Range
When using 40 V devices, EPC9060
32
(1)
V
When using 60 V devices, EPC9061
48
(1)
V
V
OUT
Switch Node Output Voltage
When using 40 V devices, EPC9060
40
V
When using 60 V devices, EPC9061
60
V
I
OUT
Switch Node Output Current
When using 40 V devices, EPC9060
25
(1)
A
When using 60 V devices, EPC9061
24
(1)
A
V
PWM
PWM Logic Input Voltage Threshold
Input ‘Low’
3.5
6
V
Input ‘High’
0
1.5
V
Minimum “High” State Input Pulse Width
V
PWM
rise and fall time < 10ns
50
ns
Minimum “Low” State Input Pulse Width
V
PWM
rise and fall time < 10ns
100
(2)
ns
(1)
Assumes inductive load, maximum current depends on die temperature – actual maximum current with be subject to switching frequency,
bus voltage and thermal cooling.
(2)
Limited by time needed to ‘refresh’ high side bootstrap supply voltage.
Figure 1: Block Diagram of Development Board
V
DD
V
IN
PWM
input
OUT
VSW
Gate drive supply
Pads for buck output filter
Half bridge
with bypass
Logic and
dead-time
adjust
Gate drive
regulator
LM5113
gate
driver
DESCRIPTION
These development boards are in a half-bridge topology with onboard
gate drives, featuring the EPC2030/31 eGaN® field effect transistors
(FETs). The purpose of these development boards is to simplify the
evaluation process of these eGaN FETs by including all the critical
components on a single board that can be easily connected into any
existing converter.
The development board is 2” x 2” and contains two eGaN FETs in a
half-bridge configuration using the Texas Instruments LM5113 gate
driver, supply and bypass capacitors. The board contains all critical
components and layout for optimal switching performance and has
additional area to add buck output filter components on the board.
There are also various probe points to facilitate simple waveform
measurement and efficiency calculation. A complete block diagram of
the circuit is given in figure 1.
For more information on the
eGaN FETs, please
refer to the datasheets available from EPC at
. The
datasheet should be read in conjunction with this quick start guide.