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WAFER-PV-D5252/D4252/N4552 SBC
Page 81
5.4 Chipset
Use the
Chipset
menu (
) to access the Northbridge and Southbridge
configuration menus
WARNING!
Setting the wrong values for the Chipset BIOS selections in the Chipset
BIOS menu may cause the system to malfunction.
Aptio Setup Utility – Copyright (C) 2010 American Megatrends, Inc.
Main
Advanced
Chipset
Boot
Security
Save & Exit
> Host Bridge
> South Bridge
> Intel IGD SWSCI OpRegion
Host Bridge Parameters
---------------------
: Select Screen
: Select Item
Enter
Select
F1 General
Help
F2 Previous
Values
F3 Optimized
Defaults
F4 Save
ESC Exit
Version 2.02.1205. Copyright (C) 2010 American Megatrends, Inc.
BIOS Menu 13: Chipset
Summary of Contents for WAFER-PV-N4552
Page 13: ...WAFER PV D5252 D4252 N4552 SBC Page 1 Chapter 1 1 Introduction...
Page 17: ...WAFER PV D5252 D4252 N4552 SBC Page 5 Figure 1 4 Dimensions with Heatsink mm...
Page 21: ...WAFER PV D5252 D4252 N4552 SBC Page 9 Chapter 2 2 Packing List...
Page 25: ...WAFER PV D5252 D4252 N4552 SBC Page 13 Chapter 3 3 Connector Pinouts...
Page 52: ...WAFER PV D5252 D4252 N4552 SBC Page 40 Chapter 4 4 Installation...
Page 72: ...WAFER PV D5252 D4252 N4552 SBC Page 60 Chapter 5 5 BIOS...
Page 103: ...WAFER PV D5252 D4252 N4552 SBC Page 91 Appendix A A BIOS Options...
Page 106: ...WAFER PV D5252 D4252 N4552 SBC Page 94 Appendix B B Terminology...
Page 110: ...WAFER PV D5252 D4252 N4552 SBC Page 98 Appendix C C Digital I O Interface...
Page 113: ...WAFER PV D5252 D4252 N4552 SBC Page 101 Appendix D D Hazardous Materials Disclosure...