10. Clocks, Resets and Power-up Options > Power-up Options
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Tsi578 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
To ensure predictable operation of the Tsi578, for power-up reset, HARD_RST_b and TRST_b must be
asserted prior to operation. After power-up, the TAP controller can be reset at any time and this does
not affect the Tsi578 operation.
Normal functional reset is still required to reset the device’s internal registers. Reset of the Tsi578 does
not reset the TAP.
10.3
Power-up Options
The Tsi578 has the following types of power-up option pins: default port speed (SP_IO_SPEED[1:0]),
port power-up and power-down (SPn_PWRDN), mode selection (SPn_MODESEL), lane swap
(SP_RX_SWAP and SP_TX_SWAP), and I
2
C pins (I2c_DISABLE, I2C_MA, I2C_SA[1:0],
I2C_SEL).
10.3.1
Power-up Option Signals
Power up options are latched at reset for initializing the
Tsi578
. The power-up option pins are listed in
. All power-up option pins have to remain stable for 10 P_CLK cycles after HW_RST_b is
de-asserted in order to be sampled correctly. These signals are ignored after reset and software is able
to override the settings.
The TAP controller must be reset on power-up, whether or not it is going to be used, to ensure
predictable operation of the Tsi578.
The power-up option pins must be stable for 10 P_CLK cycles after HARD_RST_b is
de-asserted.
The power-up signals do have internal PU or PD, however external resistors are
recommended on these signals.
