8. Performance > Port-to-Port Performance Characteristics
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Tsi578 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
8.3.3
Tsi578 RapidIO Transmission Scheduler Settings
The First Come, First Served packet scheduling algorithm is used in fair share systems. In this
algorithm, the oldest packet is transmitted. If this packet is retried, then the oldest, highest priority
packet is transmitted. The oldest packet is the transmitted again. This leads to increased latency and
decreased throughput for higher priority packets, since their forward progress is dependent upon the
speed with which a lower priority packet can be retried.
8.3.4
Tsi578 RapidIO Buffer Watermark Selection Settings
Buffer watermarks are used to restrict the transmission of lower priority packets, to the advantage of
higher priority packets. Watermark settings directly affect throughput and indirectly latency and
latency variation. For more information on watermarks, refer to
The default watermark settings should be used for the
fair share
configuration for both RapidIO ingress
buffer management and RapidIO egress buffer management.
For ‘high priority’ configurations, watermark settings should be used which deliver maximal
throughput for the highest priority packets. For ingress and egress ports, a maximum of 6 priority 2
packets can be accepted, a maximum of 4 priority 1 packets can be accepted, and a maximum of 2
priority 0 packets are accepted.
8.4
Port-to-Port Performance Characteristics
The most intuitively obvious performance measurements of the Tsi578’s use port-to-port traffic models
to characterize the maximum possible throughput and minimum latency performance of the Tsi578.
In this case, all traffic is of uniform size and the same priority. Due to the simple type of traffic, the
throughput and latency performance numbers do not change with the priority of the packets.
8.4.1
Port-to-Port Packet Latency Performance
shows the 4x and 1x mode latency numbers under no congestion with default ISF
arbitration and watermark settings. The numbers are based on the same ingress and egress port widths
and baud rates. The minimum latency is the minimum time an ingress packet takes to appear at the
egress. Due to the multi-clock domain system, the device operates in, the minimum latency can vary by
one 312.5 MHz clock period and one reference clock (S_CLK) period.
Cut-through mode is assumed.
