5. Configuration Registers
111
Tsi310 User Manual
80B6020_MA001_05
5.5.3
Miscellaneous Control Register
This register provides controls for miscellaneous functions, such as handling parity errors, in the
bridge.
Address Offset
x‘44’
Access
Read/Write
Reset Value
x‘03’ When P_CFG_BUSY (pin C6) is tied low. For more
information on strapping considerations, see
.
x‘07’ When P_CFG_BUSY (pin C6) is tied high. For more
information on strapping considerations, see
.
Note
: When designing a Tsi310-based system, see the
Tsi310
Device Errata
document for more information about the
P_CFG_BUSY signal.
Rese
rve
d
Primary C
onfig
Busy
Dat
a
Parity
Error Recov
e
ry
Enable
Parity Error
Behavior
7
6
5
4
3
2
1
0
Bit(s)
Access
Field Name and Description
7:3
RO
Reserved
2
RW
Primary Config Busy
The reset value of this bit must read b‘0’. The strapping pin P_CFG_BSY must be pulled down
on the board for normal operation.
0 = Type 0 configuration commands accepted normally on the primary bus.
Summary of Contents for Tsi310TM
Page 8: ...Contents 8 Tsi310 User Manual 80B6020_MA001_05...
Page 10: ...List of Figures 10 Tsi310 User Manual 80B6020_MA001_05...
Page 12: ...List of Tables 12 Tsi310 User Manual 80B6020_MA001_05...
Page 18: ...18 Tsi310 User Manual 80B6020_MA001_05...
Page 44: ...2 Bus Operation 44 Tsi310 User Manual 80B6020_MA001_05...
Page 58: ...3 Clocking and Reset Options 58 Tsi310 User Manual 80B6020_MA001_05...
Page 62: ...4 Transaction Ordering 62 Tsi310 User Manual 80B6020_MA001_05...
Page 150: ...5 Configuration Registers 150 Tsi310 User Manual 80B6020_MA001_05...
Page 170: ...6 Signals and Pinout 170 Tsi310 User Manual 80B6020_MA001_05...
Page 190: ...7 JTAG Boundary Scan 190 Tsi310 User Manual 80B6020_MA001_05...
Page 196: ...8 Electrical Characteristics 196 Tsi310 User Manual 80B6020_MA001_05...
Page 200: ...9 Package Information 200 Tsi310 User Manual 80B6020_MA001_05...
Page 202: ...A Ordering Information 202 Tsi310 User Manual 80B6020_MA001_05...
Page 206: ...Index 206 Tsi310 User Manual 80B6020_MA001_05...