IDT 8A 72QFN Series, User Manual

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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SILKSCRN:
XO_DPLL
Maximum voltage on pin 7 = 1.8V
Place close to ClockMatrix
VDDO_Q0
VDDO_Q1
VDDO_Q2
VDDO_Q3
VDDO_Q4
VDDO_Q5
VDDO_Q6
VDDO_Q7
VDDO_Q8
VDDO_Q9
VDDO_Q10
VDDO_Q11
VDD_FOD_0
VDD_FOD_2
VDD_FOD_5
VDDA_0
VDDA_1
VDD_FOD_0
VDD_CLK0_0
VDDD VDDD_0
VDD_FOD
CLK_Q0_P 8
CLK_Q0_N 8
CLK_Q1_P 8
CLK_Q1_N 8
CLK_Q2_P 8
CLK_Q2_N 8
CLK_Q3_P 8
CLK_Q3_N 8
CLK_Q4_P 8
CLK_Q4_N 8
CLK_Q5_P 8
CLK_Q5_N 8
CLK_Q6_P 8
CLK_Q6_N 8
CLK_Q7_P 8
CLK_Q7_N 8
CLK_Q8_P 8
CLK_Q8_N 8
CLK_Q9_P 8
CLK_Q9_N 8
CLK_Q10_P 8
CLK_Q10_N 8
CLK_Q11_P 8
CLK_Q11_N 8
GPIO3 5
GPIO9 5
GPIO1 5
GPIO2 5
GPIO4 5
GPIO5 5
GPIO0 5
CLK_CLK0_P
CLK_CLK0_N
CLK_CLK1_P
CLK_CLK1_N
CLK_CLK2_P
CLK_CLK2_N
CLK_CLK3_P
CLK_CLK3_N
CLK_CLK4_P
CLK_CLK4_N
OSCO
OSCI
PLL_I2C_SCL_SCLK
PLL_I2C_SDA_SDIO
PLL_I2C_SDA_SDI
PLL_I2C_SDA_CSN
JTAG_SEL
TST_CHIP_RST_N_OD
Title
Size Document Number Rev
Date: Sheet of
<Doc> <RevCode>
<Title>
C
1 1 Monday, May 21, 2018
Title
Size Document Number Rev
Date: Sheet of
<Doc> <RevCode>
<Title>
C
1 1 Monday, May 21, 2018
Title
Size Document Number Rev
Date: Sheet of
<Doc> <RevCode>
<Title>
C
1 1 Monday, May 21, 2018
R392 0
C
4
1
8
2
2
0
0
p
F
C
6
9
4
0
.1
u
F
U409
IDT8A35018
OSCO
1
OSCI
2
VDDA_PDCP_XTAL
3
VDDA_FB
4
nMR
5
VDD_CLK
6
XO_DPLL
7
CLK0
8
nCLK0
9
CLK1
10
nCLK1
11
CLK2
12
nCLK2
13
CLK3
14
nCLK3
15
VDD_DIG
16
CLK4
17
nCLK4
18
S
C
L
K
1
9
S
D
IO
2
0
S
D
I_
A
1
2
1
C
S
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A
0
2
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F
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3
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7
3
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9
3
4
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Q
6
3
5
Q
6
3
6
VDDO_Q6
37
VDDO_Q5
38
Q5
39
nQ5
40
VDDO_Q4
41
Q4
42
nQ4
43
VDDO_Q10
44
Q10
45
nQ10
46
GPIO2
47
VDD_GPIO_FOD
48
GPIO1
49
nQ9
50
Q9
51
VDDO_Q9
52
nQ3
53
Q3
54
V
D
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5
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6
7
V
D
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8
6
8
Q
8
6
9
n
Q
8
7
0
G
P
IO
0
7
1
c
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L
7
2
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P
A
D
7
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RK 19-03-13
J46
5-1814832-1
C
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OSCI
OSCO