IDT 89HPES24N3A, User Manual

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IDT
PES24N3A User Manual 4 April 10, 2008
Notes
Use of Hypertext
In Chapter 9, Tables 9.2 and 9.3 contain register names and page numbers highlighted in blue under the
Register Definition column. In pdf files, users can jump from this source table directly to the registers by
clicking on the register name in the source table. Each register name in the table is linked directly to the
appropriate register in the register section of the chapter. To return to the source table after having jumped
to the register section, click on the same register name (in blue) in the register section.
Reference Documents
PCI Express Base Specification, Revision 2.0, PCI Special Interest Group.
PCI Power Management Interface Specification, Revision 1.1, PCI Special Interest Group.
PCI to PCI Bridge Architecture Specification, Revision 1.2, PCI Special Interest Group.
SMBus Specification, Revision 2.0.
Revision History
February 8, 2007 : Initial Publication.
May 30, 2007 : In Table 1.2, added revision information for ZG silicon. Added Notes to Figure 2.5.
July 18, 2007 : In Chapter 9, changed bits [10:9] in HPCFGCTL from RO to RW. In Chapter 2, changed
references to correctly state SRESET field is in BCTL register, not the SWCTL register.
April 10, 2008 : In the About section, Table 2, changed SYSCNTL to SWCTL. In Chapter 9, changed
default value for VER field in PCIECAP register from 0x2 to 0x1 and changed 0x0 definition for bit EEPE in
SWPERCTL register from “time-out” to “end-to-end parity error”.
Read and Write Clear RW1C Software can read and write to registers/bits with this attribute.
However, writing a value of zero to a bit with this attribute has no
effect. A RW1C bit can only be set to a value of 1 by a hardware
event. To clear a RW1C bit (i.e., change its value to zero) a value
of one must be written to the location. An RW1C bit is never
cleared by hardware.
Read and Write when
Unlocked RWL Software can read the register/bits with this attribute. Writing to
register/bits with this attribute will only cause the value to be modi-
fied if the REGUNLOCK bit in the SWCTL register is set. When
the REGUNLOCK bit is cleared, writes are ignored and the regis-
ter/bits are effectively read-only
Write Transient WT The zero is always read from a bit/field of this type. Writing of a
one is used to quality the writing of other bits/fields in the same
register.
Zero Zero A zero register or bit must be written with a value of zero and
returns a value of zero when read.
Type Abbreviation Description
Table 2 Register Terminology (Sheet 2 of 2)