IDT 89HPES24N3A, User Manual

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IDT Theory of Operation
PES24N3A User Manual 3 - 14 April 10, 2008
Notes
Table 3.13 lists the error checks performed by the egress transaction layer for malformed TLPs. These
error checks are performed when a TLP leaves the switch (i.e., by the stack associated with the port on
which the TLP leaves the switch).
Routing Errors
This section lists TLP routing errors that are detected by the PES24N3A. All of these errors are treated
as unsupported requests.
I/O read or write request LENGTH = 1 (doubleword)
TC = 0
ATTR = 0
Last DWord BE[3:0] = 0b0000
Configuration read or write request LENGTH = 1 (doubleword)
TC = 0
ATTR = 0
Last DWord BE[3:0] = 0b0000
Message Requests
interrupt message
Power management message
Error signalling message
Unlock message
Set power limit message TC = 0
TLPs with Route to Root Complex rout-
ing. May only be received on downstream ports.
TLPs with Broadcast from Root Com-
plex routing. May only be received on upstream ports.
TLPs with Gathered and Routed to
Root Complex routing May only be received by the downstream ports.
Must be a PME_TO_ACK message (all other TLP
types with this routing are illegal).
Interrupt messages (INTx) May only be received by the downstream ports
Trusted Cfg Request May only be received on upstream port (refer to PCIe
specification 2.0, section 6.12.1).
All TLP traffic class (TC) must be mapped to VC0. TC to
VC mapping is controlled by the TC/VC Map (TCVC-
MAP) field in the ingress port’s VC Resource 0 Con-
trol (VCR0CTL) register.
TLP Type Error Check
All TLP traffic class (TC) must be mapped to VC0. TC to
VC mapping is controlled by the TC/VC Map (TCVC-
MAP) field in the egress port’s VC Resource 0 Con-
trol (VCR0CTL) register
Table 3.13 Egress Malformed TLP Error Checks
TLP Type Error Check
Table 3.12 Ingress Malformed TLP Error Checks (Part 2 of 2)