IDT Transparent Mode Operation
PES16NT2 User Manual
9 - 2
April 15, 2008
Notes
End-to-End CRC
PCIe® defines an optional end-to-end CRC associated with TLPs. The PES16NT2 fully supports ECRC
for all TLPs that pass through the switch except for transactions utilizing gathered and routed to root
complex implicit routing. For transactions received with this routing type, the ECRC is discarded and not
checked and the resulting gathered message is generated without an ECRC. The only standard defined
message that utilizes this method of routing is the PME_TO_Ack message.
The PES16NT2 does not support ECRC for TLPs that it generates (e.g., configuration responses, INTx
messages, etc.). Also, it does not support ECRC for TLPs it consumes (e.g., configuration requests).
However; if a TLP is received with an ECRC, the CRC is discarded and not checked and the transaction is
performed.
Interrupts
The PCI-to-PCI bridges associated with ports A and C do not support generation of legacy interrupts or
MSIs.
Error Detection and Handling
This section describes error detection performed by an ingress or egress stack when the switch is
configured to operate in transparent mode. Table 9.1 lists error checks performed by the physical layer and
action taken when an error is detected.
Table 9.2 lists error checks performed by the data link layer and action taken when an error is detected.
Error Condition
PCIe Base
1.0a
Specification
Section
Action Taken
Invalid symbol or running disparity error
detected.
4.2.1.3
Correctable error processing
Any TLP or DLLP framing rule violation.
4.2.2.1
Correctable error processing
8b/10b decode error
4.2.4.4
Correctable error processing
Any violation of the link initialization or
training protocol
4.2.4
Uncorrectable error processing
Table 9.1 Physical Layer Errors
Error Condition
PCIe Base
1.0a
Specification
Section
Action Taken
TLP ending in ENDB with LCRC that
does not match inverted calculated LCRC
3.5.3.1
TLP discarded
TLP received with incorrect LCRC
3.5.3.1
Correctable error processing
TLP received with sequence number not
equal to NEXT_RCV_SEQ and this is not
a duplicate TLP
3.5.3.1
Correctable error processing
Bad DLLP
1
3.5.2.1
Correctable error processing
Table 9.2 Data Link Layer Errors
Summary of Contents for 89HPES16NT2
Page 14: ...DT List of Figures PES16NT2 User Manual viii April 15 2008 Notes...
Page 20: ...IDT Register List PES16NT2 User Manual xiv April 15 2008 Notes...
Page 32: ...IDT PES16NT2 Device Overview PES16NT2 User Manual 1 12 April 15 2008 Notes...
Page 50: ...IDT Link Operation PES16NT2 User Manual 3 6 April 15 2008 Notes...
Page 62: ...IDT Power Management PES16NT2 User Manual 5 4 April 15 2008 Notes...
Page 78: ...IDT SMBus Interfaces PES16NT2 User Manual 6 16 April 15 2008 Notes...
Page 83: ...IDT NTB Upstream Port Failover PES16NT2 User Manual 7 5 April 15 2008 Notes...
Page 84: ...IDT NTB Upstream Port Failover PES16NT2 User Manual 7 6 April 15 2008 Notes...
Page 130: ...IDT Transparent Mode Operation PES16NT2 User Manual 9 44 April 15 2008 Notes...
Page 284: ...IDT Non Transparent Mode Operation PES16NT2 User Manual 10 154 April 15 2008 Notes...