3
Table of Contents
CHAPTER 1. INTRODUCTION......................... 6
1.1
S
PECIFICATIONS
.................................................. 7
1.2
P
ACKAGE
C
ONTENTS
.............................................. 9
CHAPTER 2. INSTALLATION ........................ 10
2.1
WAFER-5823
B
LOCK
D
IAGRAM
&
B
OARD
L
AYOUT
........ 10
2.2
U
NPACKING
P
RECAUTIONS
..................................... 13
2.3
S
YSTEM
M
EMORY
DRAM....................................... 13
2.4
W
ATCH
-D
OG
T
IMER
S
ETTING
................................. 13
2.5
C
LEAR
CMOS
S
ETUP
........................................... 14
2.6
LCD
VCC
V
OLTAGE
........................................... 14
2.7
C
OMPACT
F
LASH
S
ETTING
...................................... 15
CHAPTER 3. CONNECTION........................... 16
3.1
F
LOPPY
D
ISK
D
RIVE
C
ONNECTOR
(CN2) .................... 16
3.2 PCI
E-IDE
D
ISK
D
RIVE
C
ONNECTOR
(CN10).............. 17
3.3
C
OMPACT
F
LASH
C
ONNECTOR
(CN11)....................... 18
3.4
P
ARALLEL
P
ORT
(CN7)......................................... 19
3.5 S
ERIAL
P
ORTS
(CN5,
CN6) .................................. 19
3.6
K
EYBOARD
&
PS/2
M
OUSE
C
ONNECTOR
(CN1)............ 20
3.7
USB
P
ORT
C
ONNECTOR
(CN12) ............................. 21
3.8
I
R
DA
I
NFRARED
I
NTERFACE
P
ORT
(CN8) ................... 21
3.9
VGA
C
ONNECTOR
(CN16) .................................... 22
Summary of Contents for WAFER-5823
Page 11: ...11 WAFER 5823 Board Jumper Setting...
Page 12: ...12 WAFER 5823 Board Dimensions...