39
Select
Enabled
if your system contains a Universal Serial Bus (USB)
controller and you have a USB keyboard.
The Choice: Enabled, Disabled.
OnChip Sound
This item allows you to control the onboard AC 97 audio
.
The Choice: Auto, Disabled.
CPU to PCI Write Buffer
When this field is
Enabled,
writes from the CPU to the PCI bus are buffered,
to compensate for the speed differences between the CPU and the PCI bus.
When
Disabled
, the writes are not buffered and the CPU must wait until the
write is complete before starting another write cycle.
The Choice: Enabled,Disabled.
PCI Dynamic Bursting
When
Enabled,
every write transaction goes to the write buffer. Burstable
transactions then burst on the PCI bus and nonburstable transactions don’t.
The Choice: Enabled,Disabled.
PCI Master 0 WS Write
When
Enabled,
writes to the PCI bus are executed with zero wait states.
The Choice: Enabled,Disabled.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay
transactions cycles. Select
Enabled
to support compliance with PCI
specification version 2.1.
The Choice: Enabled,Disabled.
PCI#2 Access #1 Retry
When disabled, PCI#2 will not be disconnected until access finishes (difault).
When enabled, PCI#2 will be disconnected if max retries are attempted
without success.
The Choice: Enabled,Disabled.
Memory Parity/ECC Check
This item
enabled
to detect the memory parity and Error Checking &
Correcting.
The Choice: Enabled,Disabled.
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4.8 Integrated Peripherals
CMOS Setup Utility – Copyright © 1984 – 2000 Award Software
Integrated Peripherals
OnChip IDE Channel0 [Enabled]
OnChip IDE Channel1 [Enabled]
IDE Prefetch Mode [Enabled]
Primary Master PIO [ Auto]
Primary Slave PIO [Auto]
Secondary Master PIO [Auto]
Secondary Slave PIO [Auto]
Primary Master UDMA [Auto]
Primary Slave UDMA [Auto]
Secondary Master UDMA [Auto]
Secondary Slave UDMA [Auto]
Init Display First [PCI Slot]
Onboard 1394 Device [Enabled]
Onboard Lan Device [Enabled]
IDE HDD Block Mode [Enabled]
Onboard FDC Controller [Enabled]
Onboard Serial Port 1 [Auto]
Onboard Serial Port 2 [Auto]
UART 2 Mode [Standard]
IR Function Duplex [Half]
TX,RX inverting enable [No, Yes]
Onboard Parallel Port [378/IRQ7]
Onboard Parallel Mode [Normal]
ECP Mode Use DMA [3]
Parallel Port EPP Type [EPP1.9]
Onboard Legacy Audio [Enabled]
Sound Blaster [Enabled]
SB I/O Base Address [220H]
SB IRQ Select [IRQ 5]
SB DMA Select [DMA 1]
Item Help
____________________
Menu Level
If your IDE hard drive
supports block mode select
Enabled for automatic
detection of the optimal
number of block read/write
per sector the drive can
support
↑↓←→
Move Enter: Select +/-/PU/PD: Value F10:Save ESC: Exit F1:General Help
F5:Previous Values F6:Fail-safe defaults F7:Optimized Defaults
On-Chip IDE Channel0/1
The chipset contains a PCI IDE interface with support for two IDE channels.
Select Enabled to activate the primary IDE interface. Select Disabled to
deactivate this interface
The choice: Enabled, Disabled.
