NOVA-7896/7896FW Socket 370 Celeron
TM
& Pentium III
®
Multimedia & Dual Ethernet ,IEEE1394, Embedded Board
50
EGMRCLK Control
This item controls the phase of EGMRCLK that lags behind SDCLK.
The choice: -1.0ns~+6.5ns (Default 0.0ns)
EGMWCLK Control
This item controls the phase of EGMWCLK that lags ahead SDCLK.
The choice: +5.0ns~-2.5ns (Default 0.0ns)
System BIOS Cacheable
Selecting
Enabled
allows caching of the system BIOS ROM at F0000h-FFFFFh,
resulting in better system performance. However, if any program writes to this
memory area, a system error may result.
The choice: Enabled, Disabled.
Vedio RAM Cacheable
Select Enabled allows caching of the video RAM , resulting in better system
performance. However, if any program writes to this memory area, a system
error may result.
The choice: Enabled, Disabled.
Memory Hole at 15M-16M
You can reserve this area of system memory for ISA adapter ROM. When this
area is reserved, it cannot be cached. The user information of peripherals that
need to use this area of system memory usually discusses their memory
requirements.
The Choice: Enabled, Disabled.
Summary of Contents for NOVA-7896
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