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4 - 3
MODULATION CIRCUIT
The modulation signal from the TX AF circuits is applied to
D15 of the TX VCO (Q14, D14–D16) to modulate it (FM for
the analog mode, 4FSK for the digital mode). The modulated
signal from the TX VCO is buffer-amplified by two buffers
(Q8, Q10), and applied to the TX AMP circuits through the
LO SW (D5).
TX AMPLIFIERS
The buffer amplifi ed signal from the LO SW (D5) is sequen-
tially amplified by the pre-AMP (Q4), pre-drive AMP (Q3),
drive AMP (Q2), and power AMP (Q1), to obtain TX power.
The amplifi ed TX signal is passed through the antenna SW
(D3, D22) and the LPF, which eliminates harmonics, and
then fed to the antenna.
APC CIRCUITS
D1 and D2 rectify a portion of the TX signal to direct voltage,
and the APC AMP (IC1) compares the voltage and the TX
power control reference voltage, “T1.” The resulting voltage
controls the gain of the power and drive AMPs to keep the
TX power constant.
• FREQUENCY SYNTHESIZER CIRCUITS
• TX AMPLIFIERS AND APC CIRCUITS
5-4 VOLTAGE DIAGRAMS
LO
SW
D5
Q14,
D14,D16,D17
MODULATION FM:Analog
4-FSK: Digital
D15
BUFF
Q8
BUFF
Q10
TX VCO
From the TX AF circuits
To the TX AMP circuits
MOD
LPF
PWR
DET
D1,D2
MUTE
SW
Q6
ANT
SW
D1,D22
PWR
AM P
Q1
APC
AMP
IC1
DRIVE
AM P
Q2
AMP
PRE
Q4
DRIVE
PRE
Q3
T1
TMUT
ANT
From the
TX VCO
To the RX circuits
• MODULATION CIRCUIT
LPF
LPF
LO
SW
D5,D6
Q13,D12
Q14,D16
FILTER
LOOP
PLL
IC
SO,SCL,PLST
IC4
X3
Q26
Q23
To the TX AMPs
BPF
BUFF
Q8
BUFF
Q10
BUFF
Q9
X2
TCXO
LV
ADJ
D14
LV
ADJ
D11
BUFF
IC60
IF IC
RX VCO
TX VCO
IC3
REF
BAL
15.3MHz
45.9MHz
1st IF mixer
LV
LVA
S5
REG
Q71,Q86
REG
R5
Q72,Q87
REG
T5
Q73,Q88
F51
R1(CHASSIS)
1
2
BT1
REG
+5V
IC54
DC-DC
1.6V
IC900
DC-DC
3.3V
IC65
REG
+3.3V
Q90,Q91
Q92,
Q93,
D59
POWER
SW
LINE
FILTER
LINE
FILTER
LINE
FILTER
LIN E
FILTER
VCC
+5V
T5V
Transmit circuits
Receive circuits
TX/RX common circuits
TX/RX common circuits
Logic circuits
R5V
S5V
TX C
RXC
S5C
VCC
CPUV
CVDD_1.6 V
3.3V_VD D
+3.3V
+3.3V_A
+3.3V
PWON
POSWH
DVDD_3.3V
DSP
DSP flash
Liner codec
DSP reference voltage
CPUV
4-3 FREQUENCY SYNTHESIZER CIRCUITS
The RX VCO is composed of Q13, and D11, D12. The VCO
output signal is buffer-amplifi ed by two buffers (Q8 and Q10)
and applied to the 1st IF mixer, through the LO SW (D6) and
the LPF (L18, C208, C209).
The TX VCO is composed of Q14 and D14–D17. The VCO
output signal is buffer-amplifi ed by two buffers (Q8 and Q10)
and applied to the pre-AMP (Q4), through the LO SW (D5)
and the LPF.
A portion of signal generated by each VCO is fed back to
the PLL IC (IC4, pin 17) through the buffer (Q9) and the LPF
(L46, C167, C168).
The applied VCO output signal is divided and phase-com-
pared with a 15.3 MHz reference frequency signal from the
TCXO (X2), which is also divided. The resulting signal is
output from the PLL IC (IC4), and DC-converted by the loop
fi lter, and then applied to the VCO as the lock voltage.
When the oscillation frequency drifts, its phase changes
from that of the reference frequency, causing a lock voltage
change to compensate for the drift in the VCO oscillating fre-
quency.