4 - 3
• TX AMPLIFIERS AND APC CIRCUIT
• FREQUENCY SYNTHESIZER CIRCUITS
4-4 VOLTAGE BLOCK DIAGRAM
LPF
PWR
DET
D1,D2
MUTE
SW
Q6
ANT
SW
D3,D22
PWR
AM P
Q1
APC
AMP
IC1
DRIVE
AM P
Q2
DRIVE
PRE
Q3
PRE
AM P
Q4
LPF
T1
TMUT
ANT
From the
TX VCO
To the RX circuits
LPF
LO
SW
D5,D6
Q13,D12
Q14,D16
FILTER
LOOP
PLL
IC
SO,SCL,PLST
IC2
X3
Q26
Q23
To the TX AMPs
BPF
BUFF
Q8
BUFF
Q10
BUFF
Q9
X2
TCXO
LV
ADJ
D14
LV
ADJ
D11
BUFF
IC60
LPF
IF IC
RX VCO
TX VCO
IC3
REF
BAL
15.3MHz
45.9MHz
1st IF mixer
LV
LVA
T5
To the TX circuits
To the RX circuits
To both RX and TX circuits
To both RX and TX circuits
To the logical circuits
REG
Q73
REG
+5V
Q74-76
REG
S5
Q71
S5
CPU5
REG
IC54
REG
R5
Q72
S5C
VCC
R5C
+5V
T5C
S5V
R5V
PWON
CPU5
T5V
TX AMPLIFIERS
The buffer amplified signal from the LO SW (D5) is amplified
by; the pre-AMP, pre-drive AMP, drive AMP, and power AMP
in sequence, to obtain TX power. The amplified TX signal
is passed through the antenna SW and the LPF, which
eliminates harmonics, and then fed to the antenna.
APC CIRCUITS
D1 and D2 rectify a portion of the TX signal to direct current,
and the APC AMP compares the voltage and the TX power
control reference voltage, “T1.” The resulting voltage controls
the gain of the power and drive AMPs to keep the TX power
constant.
4-3 FREQUENCY SYNTHESIZER CIRCUITS
The RX VCO is composed of Q13, D11 and D12. The VCO
output signal is buffer-amplified by two buffers and applied
to the 1st IF mixer, via the LO SW (D6) and the LPF.
The TX VCO is composed of Q14 and D14–D16. The VCO
output signal is buffer-amplified by two buffers and applied
to the 1st IF mixer, via the LO SW (D6) and the LPF.
A portion of oscillated signal from each VCO is fed back to
the PLL IC via the buffer and the LPF.
The applied VCO output signal is divided and phase-
compared with a 15.3 MHz reference frequency signal from
the TCXO, which is also divided. The resulting signal is
output from the PLL IC, and DC-converted by the loop filter,
and then applied to the VCO as the lock voltage.
When the oscillation frequency drifts, its phase changes
from that of the reference frequency, causing a lock voltage
change to compensate for the drift in the VCO oscillating
frequency.
