![background image](http://html.mh-extra.com/html/icom/ic-756proiii/ic-756proiii_service-manual_612301008.webp)
3 - 2
3-1-5 1ST IF CIRCUIT (RF-B UNIT)
The 1st IF circuit filters and amplifies the 1st IF signal. The
1st IF signal combined at L1018 and is then applied to a
MCF (Monolithic Crystal Filter; FI1701) to suppress out-of-
band signals.
The 1st IF signal level is adjusted at the PIN attenuators
(D1001, D1003, D1004; sub or D1201, D1203, D1204 for
main) controlled by the [BAL] controller for the dualwatch
function. The signal is applied to the 1st IF amplifier (Q1008;
sub or Q1208; main) and then combined at L1018.
The combined signal is pass through the MCFs (FI1701)
and is then applied to the 1st IF amplifier (Q1751). The
amplified signal is then applied to the 2nd mixer circuit.
3-1-6 2ND MIXER CIRCUIT (RF-B UNIT)
The 2nd mixer circuit mixes the 1st IF signal and 2nd LO
signal (64.00 MHz) for conversion into the 2nd IF signal.
The 1st IF signal from the 1st IF amplifier (Q1751) is con-
verted into a 455 kHz 2nd IF signal at the 2nd mixer circuit
(D1752).
The 2nd IF signal is applied to the noise blanker gate
(MAIN-A unit) via the J1851.
3-1-7 NOISE BLANKER CIRCUIT (MAIN-A UNIT)
The noise blanker circuit detects pulse-type noise, and
turns OFF the signal line when the noise appears.
The 2nd IF signal from the RF-B unit is applied to the noise
blanker gate (D113, D114).
A portion of the 2nd IF signal is amplified at the noise
amplifiers (Q271–Q273, Q279), and is then detected at the
noise detector (D271) to convert the noise components to
DC voltages.
The signal is then applied to the noise blanker switch (Q276,
Q278). At the moment the detected voltage exceeds Q276’
s threshold level, Q278 outputs a blanking signal to close
the noise blanker gate (D113, D114). The PLL unlock sig-
nal are also applied to Q278, to control the noise blanker
gate.
Some DC voltage from the noise detector circuit is fed back
to the noise amplifiers (Q271, Q272) via the DC amplifiers
(Q274, Q275). The DC amplifiers function as an AGC cir-
cuit to reduce average noise. Therefore, the noise blanker
function shuts off pulse-type noise only.
3-1-8 2ND IF CIRCUIT (MAIN-A UNIT)
The 2nd IF circuit amplifies and filters the 2nd IF signal,
and applies the 2nd IF signal to the 3rd mixer circuit.
The 2nd IF signal from the noise blanker gate (D113,
D114) is amplified at the 2nd IF amplifier (Q141) and
passed through the ceramic filter (FI111). The filtered sig-
nal is applied to the 3rd mixer circuit.
3-1-9 3RD MIXER AND 3RD IF CIRCUITS
(MAIN-A UNIT)
The 3rd mixer circuit mixes the 2nd IF signal and the 3rd
LO signal to obtain the 3rd IF (36 kHz) signal.
The 2nd IF signal from the ceramic filter (FI111) is applied
to the 3rd mixer circuit (IC151, pin 1). The 3rd LO signal
from the PLL unit is applied to the 3rd mixer (IC151, pin 5).
The 3rd IF signal is output from pin 6.
The 3rd IF signal is passed through the low-pass filter
(IC201a) and amplified at the 3rd IF amplifier (IC201b). The
amplified signal is then applied to the DSP-A board via
J201 (pin 27) as DRIF signal.
3-1-10 DSP RECEIVER CIRCUIT (DSP-A BOARD)
The DSP (Digital Signal Processor) circuit enables digital
IF filter, digital noise reduction, digital PSN (Phase Shift
Network)/Low Power/Phase demodulation, digital automatic
notch, and etc.
The 36 kHz 3rd IF signal from the 3rd IF amplifier (MAIN-A
unit, IC201b) is amplified at the differential amplifiers
(IC2301a/b) after being passed through the T/R switch
(IC2291), and is then applied to the A/D converter (IC2321).
Differential
converter
A/D
converter
DRIF
DRAF
• DSP receiver circuit
6
7
1
IC2291
IC2301b/a
IC2321
Level
converter
IC2051
D/A
converter
IC2052
Level
converter
IC2351
DSP IC
IC2001
LPF
IC2401
T/R switch
1 3
12
1 4
IC2372x
15
9
1
IC2372y
HPF
IC2441a
Mixer
amplifier
IC2471a
5
3
4
IC2372z
4
7
1
IC2473
MAIN-A unit
DSP-A board
MAIN-A unit
36 kHz
3rd IF
signal
AF
signals
“TXS” signal
“TXS” signal
“TXS” signal
5
11
10