Icom IC-7400, Service Manual, Page: 11 / 92

4 - 3
4-1-10 TWIN PBT CIRCUIT (DSP UNIT)
General PBT (Passband Tuning) circuit shifts the center fre-
quency of IF signal to electronically narrow the passband
width. The IC-746PRO/7400 uses the DSP circuit for the
digital PBT function and actually shifts the both lower and
higher passbands of 3rd IF filter within ±1.8 kHz.
The twin PBT circuit in DSP IC (IC301) controlled by the
[TWIN PBT] controller adjusts the 3rd IF passband width
and rejects interference.
4-1-11 AGC CIRCUIT (DSP UNIT)
The AGC (Automatic Gain Control) circuit reduces IF ampli-
fier gain and attenuates IF signal to keep the audio output at
a constant level.
The receiver gain is determined by the voltage on the AGC
line (MAIN unit; IC1401, pin 14). The D/A converter for AGC
(IC102) supplies control voltage to the AGC line and sets the
receiver gain with the [RF/SQL] control.
The 3rd IF signal from the CODEC IC (IC501) is detected at
the AGC detector section in the DSP IC (IC301). The output
signal from the DSP IC (IC301) is level-shifted at the level
converter (IC101) and applied to the D/A converter (IC102).
The AGC voltage is amplified at the buffer amplifier section
in IC102 and is applied to the MAIN unit to control the AGC
line.
When receiving strong signals, the detected voltage increas-
es and the AGC voltage decreases via the buffer amplifier
(IC102). As the AGC voltage is used for the bias voltage of
the IF amplifiers (RF unit; Q241, MAIN unit; Q250), IF ampli-
fier gain is decreased.
4-1-12 SQUELCH CIRCUIT (MAIN UNIT)
The squelch circuit mutes audio output when the S-meter
signal is lower than the [RF/SQL] setting level.
The NSQL or VSQL signal from the DSP unit is applied to
the main CPU (IC1500) and is compared with the threshold
level set by the [RF/SQL] control. The [RF/SQL] setting sig-
nal is passed through the sub CPU (DISPLAY board;
IC1001, pin 91), and then applied to the main CPU. The
main CPU analyzes the compared signal and outputs con-
trol signal to the squelch gate (IC1160, pin 5) to open or
close the squelch as the SQLS signal.
4-1-13 AF AMPLIFIER CIRCUIT (MAIN UNIT)
The AF amplifier amplifies the audio signals to a suitable dri-
ving level for the speaker.
The AF signals (DRAF) from the DSP unit are passed
through the squelch gate (IC1160) and amplified at the AF
amplifier section of IC1180 (pins 2, 4), and volume is con-
trolled by the AFGV signal at the VCA section (pins 7–9).
The volume controlled AF signals are passed through the AF
mute gate (IC1220, pins 7, 1), then applied to the AF power
amplifier (IC1240, pin 1) via the ripple filter (Q1280).
The amplified audio signals are passed through the
[PHONES] and [EXT SP] jacks then applied to the internal
speaker when no plug is connected to the jacks.
The AF mute gate is controlled by the [AF] control via the
sub and main CPUs.
4-1-14 TONE SQUELCH CIRCUIT (MAIN UNIT)
A portion of the detected FM audio signals from the DSP unit
via the MONI line are amplified at the AF amplifier (IC1060).
The amplified signals are applied to the low-pass filter
(IC1001) to cut-out the 300 Hz or higher audio components,
and subaudible tone signals only pass through. The filtered
signal (subaudible tone) is then applied to the main CPU
(IC1500, pin 108).
The main CPU detects the frequency of the applied subaudi-
ble tone signal and releases the audio mute when a matched
tone frequency signal is detected.
[PHONES]
[EXT SP]
Int. speaker
IC1240
AF
power
amp.
DRAF
• AF amplifier circuit
7
6
1
IC1160 IC1180
Mute switch Squelch gate
Ripple
filter
Q1260
MAIN unit DSP unit
“SQLS” signal
“AFGV” signal
5
6
7
1
IC1120
“AFMS” signal
5
AMP VCA