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IBM Personal System/2 65 SX, Technical Reference, Page: 65 / 66

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Summary of Contents for Personal System/2 65 SX

Page 1: ......

Page 2: ...cation at any time It is possible that this publication may contain reference to or information about IBM Products machines and programs programming or services that are not announced in your country...

Page 3: ...ams or services except those expressly designated by IBM are the user s responsibility IBM may have patents or pending patent applications covering subject matter in this document The furnishing of th...

Page 4: ......

Page 5: ...nce should be used with the following publications IBM Personal System 2 Hardware Interface Technical Reference Architectures IBM Personal System 2 Hardware Interface Technical Reference Common Interf...

Page 6: ...vi...

Page 7: ...POS Register 4 Hex 0104 0 2 9 System Board POS Register 5 Hex 0105 2 10 Adapter Setup 0 0 0 cee ee 2 12 Section 3 System Board 0 3 1 Description 000 00 00 00 2 ce een 3 3 Microprocessor and Math Copr...

Page 8: ...Type 2 Serial Port Controller Hardware Compatibility vill...

Page 9: ...x 0103 System Board POS Register 4 Hex 0104 Memory Card IDBits System Board POS Register 5 Hex 0105 Memory Connector Select for POS Register4 Adapter Enable Setup Register Hex 0096 Arbitration Bus Pri...

Page 10: ...3 23 3 24 System Control Port B Read System Control Port A...

Page 11: ...ures 0000 1 3 System Board I O Address Map 1 5 Specifications 000 00 000 1 6 Power Supply 0 0000 00 00 eee eee 1 9 Outputs 2 2 0 0 00000 ee ee 1 9 Output Protection 2 0 00 0000088 1 10 Voltage Sequenc...

Page 12: ...Notes 1 2 Model 65 System Overview October 1990...

Page 13: ...rrupt hex 15 function code AH hex CO returns the model byte submodel byte and BIOS revision code Refer to the BM Personal System 2 and Personal Computer BIOS Interface Technical Reference manual for a...

Page 14: ...or Device Controiter Auxiliary device connector Password security Diskette Drive 1 Supports Controller 1 44MB formatted diskette density 720KB formatted diskette density Serial Controlier 2 RS 232C in...

Page 15: ...d Enable Setup Register 0096 Adapter Enable Setup Register OOAO O0A1 Interrupt Controller Slave 00CO OODF DMA Controller 4 7 OOFO OOFF Math Coprocessor 0100 0107 Programmable Option Select 0278 027B P...

Page 16: ...s 625 min Bus Master Access to System Board RAM 300 min DMA Controller 8 MHz 125 ns Clock Single Transfer 375 I O Access Memory Access Burst Transfer 375 I O Access Memory Access N System Board Memory...

Page 17: ...d by IBM Maximum configuration Electromagnetic Compatibility Input Voltage Range is automatically selected sinewave input is required 165 mm 6 5 in 483 mm 19 0 in 597 mm 23 5 in 20 6 kg 45 3 Ib 1 8 m...

Page 18: ...ssure levels at the operator position if any for the random sample of machines is the mean value of the A weighted sound pressure levels at the one meter positions for the random sample of machines Al...

Page 19: ...nd the drives The system board voltages are 5 Vdc 12 Vde and 12 Vde The drive voltages are 5 Vdc and 12 Vdc The following is a list of the power provided for each of the components Maximum Current Sys...

Page 20: ...ns to normal operation only after the fault has been removed and the power switch has been turned off for at least ten seconds Voltage Sequencing At power on time the output voltages track within 50 m...

Page 21: ...05 2 6 System Board Enable Setup Register Hex 0094 2 7 System Board POS Register 2 Hex 0102 2 8 System Board POS Register 3 Hex 0103 2 9 System Board POS Register 4 Hex 0104 2 9 4MB Memory Cards 00 00...

Page 22: ...Notes 2 2 Model 65 POS October 1990...

Page 23: ...uld not use the adapter identification ID unless absolutely necessary Compatibility problems can result If an adapter and the system board are in setup mode at the same time bus contention occurs When...

Page 24: ...r system board functions Adapter Setup Bit 3 in the Adapter Enable Setup register must be set to 1 to allow adapter setup Bit 5 in the System Board Enable Setup register must be set to 1 to avoid driv...

Page 25: ...Control Register 0106 Reserved 0107 Reserved Figure 2 1 System Board POS I O Address Map Card Selected Feedback Whenever the system addresses an adapter the adapter responds by setting the card select...

Page 26: ...cycle or whenever the system board I O functions diskette drive serial or parallel interfaces are accessed by an I O cycle Reading this register resets the bit to 0 System Board Setup The integrated I...

Page 27: ...1 this bit enables the system board functions Bit 6 This bit is reserved Bit 5 When set to 0 this bit places the video subsystem in the setup mode and control is through POS Register 2 hex 0102 When...

Page 28: ...bidirectional interface When set to 1 this bit disables the bidirectional mode This bit is set to 0 at power on time and the power on self test POST sets it to 1 Bits 6 5 These bits select the config...

Page 29: ...ter controls the system board memory Bit Function 7 1 Reserved 0 Enable System Board RAM Figure 2 6 System Board POS Register 3 Hex 0103 Bits 7 1 These bits are reserved Bito When set to 1 this bit en...

Page 30: ...is bit enables the second 1MB ona 2MB memory card BitO When set to 1 this bit enables a 1MB memory card or the first 1MB on a 2MB memory card System Board POS Register 5 Hex 0105 This is the memory co...

Page 31: ...d access addresses to RAM and disables the write access addresses Bit 5 of this register must be set to 0 before ROM can be disabled When set to 0 this bit sets the memory access speed to 1 2 or 3 wai...

Page 32: ...rough 8 respectively When bit 3 is set to 1 these bits select the connector that is put into setup mode Associated with each channel connector is a unique card setup signal used to put the adapters in...

Page 33: ...rror Recovery 0 0 0 eee ees System Memory Map 000 002 System Board Memory Connectors RT CMOS RAM 0 00 0c ee eee RT CMOS Address and NMI Mask Register Hex 0070 RT CMOS Data Register Hex 0071 RT CMOS RA...

Page 34: ...Notes 3 2 Model 65 System Board October 1990...

Page 35: ...de The 80387SX Math Coprocessor is software compatible with the 80387 Math Coprocessor Micro Channel Implementation This section describes the implementation of the Micro Channel architecture on the M...

Page 36: ...tive by devices on levels 0 and 1 by a refresh operation and by the previous controlling master The diskette drive controller should not be held inactive for more than 12 microseconds to prevent data...

Page 37: ...ring arbitration cycles This bit can be set to 0 if an arbitrating device requires total control of the channel bandwidth This bit is set to 0 by a system reset Reading this bit as a 1 indicates syste...

Page 38: ...the most recent grant state This information allows the system microprocessor to determine the arbitration level of the device that caused a bus time out Micro Channel Connectors The Model 65 SX syst...

Page 39: ...nd 32 O Head 1 Select 33 N A Ground 34 Diskette Change 35 N A Ground 36 N A Ground 37 N A Slim Half High 38 QO 5 Vde 39 N A Ground 40 QO 12 Vde Figure 3 4 Diskette Drive Connector Memory The Model 65...

Page 40: ...ary Because 128KB of I O ROM 128KB of system board ROM and 128KB of video memory are mapped within the first 1MB of address space the first physical 1MB of RAM cannot be mapped to contiguous addresses...

Page 41: ...IBM recommends that programmable options be set only through the System Configuration utilities Directly setting the POS registers or CMOS RAM POS parameters can result in multiple assignments of the...

Page 42: ...000 XMB 256KB YMB 100000 XMB 256KB YMB to FDFFFF FE0000 to FFFFFF 640KB System Board RAM 128KB Video RAM Feature ROM RAM 128K System Board ROM mapped to RAM XMB System Board RAM 256KB System Board RAM...

Page 43: ...5 QO Address 3 51 VO Data 9 16 O Address 4 52 Vo Data 9 17 Oo Address 5 53 0 Data 10 18 oO Address 6 54 1 0 Data 10 19 N A Reserved 55 VO Data 11 20 VO Data 4 56 0 Data 11 21 VO Data 4 57 0 Data 12 22...

Page 44: ...CMOS RAM bytes and their addresses Address Hex RT CMOS RAM Bytes 000 00D Real Time Clock Bytes O00E Diagnostic Status Byte OOF Shutdown Status Byte 010 Diskette Drive Type Byte 011 013 Reserved 014 Eq...

Page 45: ...RT GMOS RAM addresses interrupts should be masked to prevent other interrupt routines from changing the RT CMOS Address register before data is read or written After 1 O operations the RT CMOS Address...

Page 46: ...of Week 6 007 Date of Month 7 008 Month 8 009 Year 9 00A Status Register A 10 00B Status Register B 11 00c Status Register C 12 00D Status Register D 13 Figure 3 10 Real Time Clock Bytes Note The Set...

Page 47: ...024 kHz square wave output frequency and a 976 562 microsecond periodic interrupt rate Status Register B Hex 00B Function Set Periodic Interrupt Enable Alarm Interrupt Enable Update Ended Interrupt E...

Page 48: ...mode The system initializes this bit to 1 When set to 1 this bit enables the daylight saving time mode When set to 0 this bit disables the mode and the clock reverts to standard time The system initi...

Page 49: ...nfiguration Memory Size Mismatch Fixed Disk Controlier Drive C Initialization Status Time Status Indicator Adapter Configuration Miscompare Adapter ID Time Out OANWOAAON Figure 3 15 Diagnostic Status...

Page 50: ...This byte indicates the type of diskeite drive installed Bit Function 7 4 First Diskette Drive Type 3 0 Second Diskette Drive Type Figure 3 16 Diskette Drive Type Byte Bits7 4 These bits indicate the...

Page 51: ...Hex 011 through 013 These bytes are reserved Equipment Byte Hex 014 This byte defines the basic equipment in the system for the power on diagnostic tests Bit Function 7 6 Number of Diskette Drives 5 4...

Page 52: ...low byte is hex 015 the high byte is hex 016 Low and High Expansion Memory Bytes Hex 017 and 078 These bytes define the amount of memory above the 1MB address space The hexadecimal values in these by...

Page 53: ...te Hex 037 Bits 7 through 0 of this byte contain the BCD value for the century Refer to the BM Personal System 2 and Personal Computer BIOS Interface Technical Reference manual for information about r...

Page 54: ...was in before the interrupt A system reset causes a reset of the NMI The NMI requests from system board parity and channel check are subject to mask control with the NMI mask bit in the RT CMOS Addre...

Page 55: ...Figure 3 23 System Control PortB Read Bit7 When set to 1 during a write operation this bit resets IRQO When read as a 1 this bit indicates a parity check has occurred Bit 6 When read asa 1 this bit in...

Page 56: ...0 when the microprocessor is in the real address mode When this bit is set to 0 A20 cannot be used in real mode addressing This bit is s t to 0 during a system reset This bit provides an alternative m...

Page 57: ...racter The eight bytes are initialized to hex 00 The microprocessor can access these bytes only during POST After the completion of a POST if a power on password is installed the password bytes are lo...

Page 58: ...Status register as a0 This method can Cause compatibility problems and is not supported by Type 1 or Type 2 serial controllers Compatibility problems can be avoided by resetting bit 0 of the Line Sta...

Page 59: ...lel 1 Parallel 2 and Parallel 3 in compatibility mode Generally compatible with the Inte 80387 80287 and 8087 math coprocessors Whenever possible BIOS or ABIOS should be used as an interface to reset...

Page 60: ...Notes 3 28 Model 65 System Board October 1990...

Page 61: ...ck enable 3 23 check latch 3 23 1 7 1 8 2 12 3 20 3 4 3 3 Copyright IBM Corp 1989 1990 channel continued connector 1 4 DMA _ 1 4 3 4 reset 2 12 clock real time 3 12 3 14 CMOS RAN 1 4 3 12 3 22 compati...

Page 62: ...ions 3 13 system board 2 8 X 2 Index K keyboard cable 1 7 password 3 25 L light fixed disk drive activity 1 9 light power 1 9 math coprocessor 1 4 3 3 measurements system unit 1 7 memory bytes 3 20 ca...

Page 63: ...grammable option select POS adapter enable setup register 2 12 address map 2 5 card selected feedback register 2 5 description 2 3 setup procedures 2 4 system configuration utilities 2 3 3 9 system bo...

Page 64: ...a enable 3 23 specifications performance 1 6 physical 1 7 status registers RT CMOS 3 15 3 17 switch to real 3 24 system configuration utilities 2 3 3 9 control ports 3 23 3 24 description 1 3 function...

Page 65: ...width system unit 1 7 Numerics 2KB CMOS RAM Extension 1 4 80386SX microprocessor 1 4 1 6 3 3 80387SX math coprocessor 1 4 3 3 Index X 5...

Page 66: ...Notes X 6 Index...

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