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IBM Personal System/2 60, Technical Reference

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Summary of Contents for Personal System/2 60

Page 1: ...I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I...

Page 2: ...ime It is possible that this publication may contain reference to or information about IBM products machines and programs programming or services that are not announced in your country Such references...

Page 3: ...ystem features and specifications Section 2 Programmable Option Select describes registers used for configuration Section 3 System Board describes the system specific hardware implementations Warning...

Page 4: ...Notes Iv...

Page 5: ...Register 2 Hex 0102 2 8 System Board POS Register 3 Hex 0103 2 9 Adapter Enable Setup Register Hex 0096 2 10 Section 3 System Board 3 1 Description 3 3 Micro Channel 3 3 Adapter Identification 3 3 Cen...

Page 6: ...Notes vi...

Page 7: ...to Hex 0090 3 5 3 3 Arbitration Register Read Hex 0090 3 5 3 4 System Memory Map 3 8 3 5 System Board Memory Connector 3 9 3 6 RT CMOS RAM Address Map 3 10 3 7 RT CMOS Address Register and NMI Mask He...

Page 8: ...Notes vIII...

Page 9: ...Section 1 System Overview Description 1 3 System Board Features 1 3 System Board Block Diagram 1 5 System Board 1 0 Address Map 1 6 Specifications 1 7 Model 60 System Overview 1 1...

Page 10: ...Notes 1 2 Model 60 System Overview...

Page 11: ...respectively Interrupt hex 15 function code AH hex CO returns the model and submodel bytes and BIOS revision code Refer to the IBM Personal System 2 and Personal Computer BIOS Interface Technical Refe...

Page 12: ...ven by System timer channel 2 The audio sum node signal Eight independent DMA channels Single or burst transfers and read verification 16 levels of system interrupts Interrupts are level sensitive Key...

Page 13: ...ller Coprocessor t Serial I optional Pori f0 r CMOS Memory r Clock Controller I DMA Parallel Controller I Pori r r Buffer I M I I iCC B Control Buffer c h u a 0 80286 f Data r n Microprocessor f Addre...

Page 14: ...stem Control Port B Keyboard Auxiliary Device RT CMOS and NMI Mask DMA Page Registers 0 3 DMA Page Registers 4 7 Central Arbitration Control Point Card Selected Feedback Register System Control Port A...

Page 15: ...Acce to S m Board RAM DMA Controller 10 MHz 100 ns Clock Number 01 Cycle Walta TIme ns 1 o 1 300 300 300 200 300 500 min 300 min Single Transfer 300 1 0 Access Memory Access Burst Transfers 300 1 0 A...

Page 16: ...e High Range Frequency Maximum Allowable Current Keyboard Port Auxiliary Device Port Elecll OIIIIIgnellc Compatibility 165 mm 6 5 In 318 mm 12 5 In 483 mm 19 0 In 597 mm 23 5 in 20 kg 44 Ib wHh one fi...

Page 17: ...Address Map 2 5 Card Selected Feedback 2 6 System Board Setup 2 6 System Board Enable Setup Register Hex 0094 2 7 System Board P S Register 2 Hex 0102 2 8 System Board P S Register 3 Hex 0103 2 9 Adap...

Page 18: ...Notes 2 2 Model 60 POS...

Page 19: ...d not use the adapter identification 10 unless absolutely necessary Compatibility problems can result If an adapter and the system board are in setup mode at the same time bus contention will occur no...

Page 20: ...stem board functions Adapter Setup Bit 3 in the Adapter Enable Setup register hex 0096 must be set to 1 to allow adapter setup Bit 5 in the System Board Enable Setup register hex 0094 must be set to 1...

Page 21: ...P S Register 0 Adapter Identification Byte Low Byte 0101 P S Register 1 Adapter Identification Byte High Byte 0102 P S Register 2 0ption Select Data Byte 1 Bit 0 is Card Enable 0103 P S Register 3 Op...

Page 22: ...o subsystem system board I O or an adapter is addressed and functioning Bit Function 7 1 Reserved o Card Selected Feedback Figure 2 2 Card Selected Feedback Register Hex 0091 Bits 7 1 Reserved Bit 0 T...

Page 23: ...hen this bit is set to 1 the system board functions are enabled Bit 6 Reserved Bit 5 When this bit is set to 0 the video subsystem is placed in the setup mode and controlled through POS Register 2 hex...

Page 24: ...gured as an 8 bit parallel bidirectional interface When set to 1 this bit disables the bidirectional mode This bit is set to 0 at power on and POST sets it to 1 Bits 6 5 These bits select the configur...

Page 25: ...rface system board serial port and system board parallel port regardless of the state of bits 4 2 and 1 System Board P S Register 3 Hex 0103 With the system board in setup this register controls the s...

Page 26: ...are addressed as 0 through 7 respectively When bit 3 is set to 1 these bits select the connector that is put into setup Each channel connector has a unique card setup signal CD SETUP associated with i...

Page 27: ...rd Memory Connector 3 9 Real Time Clock Complementary Metal Oxide Semiconductor RAM 3 10 RT CMOS Address Register and NMI Mask Hex 0070 RT CMOS Data Register Hex 0071 RT CMOS RAM 110 Operations Real T...

Page 28: ...Notes 3 2 Model 60 System Board...

Page 29: ...cture Adapter Identification When the system is powered on an adapter can issue an 10 of hex 0000 for up to 1 second after channel reset to indicate it is not ready Any adapter that continues to issue...

Page 30: ...n level 2 can be held Inactive by devices on levels 0 and 1 by a refresh operation and by the previous controlling master The diskette drive controller should not be held inactive for more than 12 mic...

Page 31: ...ate Figure 3 3 Arbitration Register Read Hex 0090 Bit 7 Setting this bit to 1 enables system microprocessor cycles during arbitration cycles This bit can be set to 0 if an arbitrating device requires...

Page 32: ...out has occurred and resets bit 6 in this register to O Bit 4 This bit is reserved and should be O Bits 3 0 These bits are undefined for a write operation and should be set to O Reading these bits re...

Page 33: ...st and last 1MB of address space hex OEOOOO and FEOOOO Random Access Memory Subsystem The RAM subsystem on the system board starts at address hex 000000 of the 16MB address space It consists of 1MB of...

Page 34: ...ference for details Hex Range 000000 to 09FFFF OAOOOO to OBFFFF OCOOOO to ODFFFF OEOooO to OFFFFF 100000 to 15FFFF 160000 to FDFFFF FEOooO to FFFFFF Function 640KB System Board RAM 128KB Video RAM 128...

Page 35: ...H 1 5 I Address BH 2 6 1 0 Data Bit 2 7 I Address BH 3 8 I Address BH4 9 N A Ground 10 1 0 Data BH3 11 I Address BH 5 12 I Address BH6 13 1 0 Data BH4 14 I Address BH7 15 I Address BH 8 16 1 0 Data Bi...

Page 36: ...tension when the power supply is not in operation The system cover can be locked to prevent battery removal and loss of password and configuration information The following figure shows the RT CMOS RA...

Page 37: ...otherwise intermittent malfunctions and unreliable operation of the RT CMOS RAM can occur Bit 7 When this bit is set to 1 the NMI is masked off the NMI is disabled This bit is set to 1 by a power on...

Page 38: ...operation following a write to hex 0070 should access hex 0071 otherwise intermittent malfunctions and unreliable operation of the RT CMOS RAM can occur The following steps are required to perform I...

Page 39: ...OD Status Register D 13 Figure 3 9 Real Time Clock Bytes Note The Setup program initializes status registers A B C and D when the time and date are set Interrupt hex 1A is the BIOS interface to read a...

Page 40: ...ave Enabled 2 Date Mode 1 24 Hour Mode o Daylight Savings Enabled Figure 3 11 Status Register B Bit 7 When set to 0 this bit updates the cycle normally by advancing the counts at a rate of one per sec...

Page 41: ...to 0 it disables the mode and the clock reverts to standard time The system initializes this bit to O Status Register C Hex OOC Bit Function 7 Interrupt Request Flag 6 Periodic Interrupt Flag 5 Alarm...

Page 42: ...Hex ODE Bit Function 7 Real Time Clock Chip Power 6 Configuration Record and Checksum Status 5 Incorrect Configuration 4 Memory Size Miscompare 3 Fixed Disk Controller Drive C Initialization Status 2...

Page 43: ...is invalid Bit 1 This bit indicates if the installed adapters match the configuration information When this bit is set to 1 the adapters do not match the configuration information Bit 0 When set to 1...

Page 44: ...e drive 48 tracks per inch 360KB High capacity diskette drive 720KB High density diskette drive 1 44MB Note All combinations that are not shown are reserved Figure 3 17 Diskette Drive Type Byte Bits 3...

Page 45: ...igure Bits Numberot 76 Disken Drive 00 One Drive 01 Two Drives 10 Reserved 1 1 Reserved Figure 3 19 Equipment Byte Bits 7 6 Bits 5 4 These bits indicate the operating mode of the display attached to t...

Page 46: ...00 is equal to 2048KB The low byte is hex 17 the high byte is hex 18 Reserved Bytes Hex 019 through 031 These bytes are reserved Configuration CRC Bytes Hex 032 and 033 These bytes contain the cyclic...

Page 47: ...NMI Nonmaskable interrupt requests from system board parity and channel check are subject to mask control with the NMI mask bit in the RT CMOS Address register The Watchdog Timer and system channel ti...

Page 48: ...n this port is read and this bit is set to 1 a parity check has occurred Bit 6 When this port is read and this bit is set to 1 a channel check has occurred Bit 5 When this port is read this bit indica...

Page 49: ...indicates the Watchdog Timer status When this bit is set to 1 a Watchdog time out has occurred For more information about the Watchdog Timer refer to the Hardware Interface Technical Reference BI13 Th...

Page 50: ...0 either by a system reset or a Write operation When a Write operation changes this bit from 0 to 1 the alternate reset pin is pulsed high for 100 to 125 nanoseconds The reset occurs after a minimum...

Page 51: ...curity space Power on password installation is a function of a program contained on the Reference diskette Once the power on password utility has been installed the password can be changed only during...

Page 52: ...d The rotate and mask functions are not supported The Mode register is partially supported The NS16450 serial port The Intel 8088 8086 and 80286 microprocessors The Intel 8272 diskette drive controlle...

Page 53: ...al arbitration control point 3 5 channel check latch 3 22 CMOS RAM 3 10 configuration CRC bytes 3 20 configuration RT CMOS 3 16 connectors memory 3 9 control ports system 3 21 D date century byte 3 20...

Page 54: ...heck enable 3 22 password power on 3 25 performance system 1 7 pointing device electrical 1 7 port system control 3 21 3 23 POS See programmable option select power specifications POS 1 7 programmable...

Page 55: ...tem board block diagram 1 5 features 1 4 I O address map 1 6 I O byte 2 8 memory 3 7 memory connectors 3 9 memory enable 2 9 memory map 3 8 setup 2 4 2 6 system configuration utilities 2 3 system port...

Page 56: ...Notes X 4 Index...

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