4
IBM
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xSeries 450 Planning and Installation Guide
Figure 1-1 xSeries 450 system block diagram
What was called the SMP Expansion module in the x440 has been divided into
two components in the x450. The component that contains the CPUs,
processor/cache controller, and cache is called the
processor-board assembly
.
The component that contains the memory controller and memory is called the
memory-board assembly
.
The CPUs are connected together with a 200 MHz frontside bus, but supply data
at an effective rate of 400 MHz using the “dual-pump” design of the Intel
Itanium 2 architecture as described in 1.4, “Intel Itanium 2 processor” on
page 10. To ensure the processors are optimally used, the x450 has a 64 MB
XceL4 Server Accelerator Cache, comprised of 200 MHz DDR memory. This L4
system cache services all CPUs.
Ultra320
SCSI
Gigabit
Ethernet
Video
3x USB
Serial
RSA
33 MHz
66 MHz
64-bit
66 MHz
64-bit
100 MHz
64-bit
133 MHz
Bus A
66 MHz
RXE
Expansion
Port A
(1 GBps)
B-100
D-133
C-133
IBM XA-64
("Summit")
core chipset
6.4 GBps
64 MB
L4 cache
400 MHz
3.2 GBps
CPU 1
CPU 2
CPU 3
CPU 4
Processor &
cache
controller
PCI bridge
PCI bridge
RXE
Expansion
Port B
(1 GBps)
1 GBps
1 GBps
200 MHz
2-way or 4-way
interleaved DDR
Port 2
3.2 GBps
Port 1
3.2 GBps
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SMI-E
SDRAM
SDRAM
Memory
controller
SMI-E
SMI-E
SMI-E
6.4 GBps
Processor-board assembly
Memory-board assembly
Summary of Contents for 450 xSeries
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