IBM PC MMX Pentium HS-4500, Manual, Page: 40 / 51

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4.4 Chipset Features Setup
This section allows you to configure the system based on the
specific features of the installed chipset. This chipset manages bus
speeds and the access to the system memory resources, such as
DRAM and the external cache. It also coordinates the
communications between the conventional ISA and PCI buses. It
must be stated that these items should never be altered. The default
settings have been chosen because they provide the best operating
conditions for your system. You might consider and make any
changes only if you discover that the data has been lost while using
your system.
ROM PCI/ISA BIOS (2A5KKD29)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration : Enabled
AT Bus Clock : CLK2/4
L2 TA RAM Size : 8
DRAM Timing : Nomal
SDRAM CAS Latency : 3
Pipilined Function : Enabled
Graphics Aperture Size : 64 MB
DRAM Date Integrity Mode : Disabled
Memory Hole At 15M-16M : Disabled
Host Read DRAM Command Mode : Syn.
AGP Read Burst : Enabled
ISA Line Buffer : Enabled
Passive Release : Enabled
Delay Transaction : Disabled
Primary Frame Buffer : All
VGA Frame Buffer : Enabled ESC : Quit
ÇÈÆÅ
: Select Item
Data Merge : Disabled F1 : Help PU/PD/+/-: Modify
IO Recovery Period : 1 us F5 : Old Values (Shift) F2 : Color
F6 : Load BIOS Defaults
F7 : Load Setup Defaults