GMS90C320
26
OCT. 2000 Ver 1.2
AC Characteristics for 12MHz version
External Program Memory Characteristics
V
CC
= 5V:
V
C C
= 5V
+
10%,
−
15%; V
S S
= 0V; T
A
= 0
°
C to 70
°
C
(C
L
for port 0. ALE and PSEN outputs = 100pF; C
L
for all other outputs = 80pF)
V
CC
= 3.3V:
V
C C
= 3.3V
+
0.3V,
−
0.6V; V
S S
= 0V; T
A
= 0
°
C to 70
°
C
(C
L
for port 0. ALE and PSEN outputs = 50pF; C
L
for all other outputs = 50pF)
Variable clock:
Vcc = 5V: 1/t
C LC L
= 3.5 MHz to 12 MHz
Vcc = 3.3V: 1/t
C LC L
= 1 MHz to 12 MHz
Parameter
Symbol
12 MHz Oscillator
Variable Oscillator
1/t
CLC L
= 3.5 to 12MHz
Unit
Min.
Max.
Min.
Max.
ALE pulse width
t
LH LL
127
-
2t
C LC L
-40
-
ns
Address setup to ALE
t
A VLL
43
-
t
C LC L
-40
-
ns
Address hold after ALE
t
LLA X
43
-
t
C LC L
-40
-
ns
ALE low to valid instruction in
t
LLIV
-
233
-
4t
C LC L
-100
ns
ALE to PSEN
t
LLP L
58
-
t
C LC L
-25
-
ns
PSEN pulse width
t
P LP H
215
-
3t
C LC L
-35
-
ns
PSEN to valid instruction in
t
P LIV
-
150
-
3t
C LC L
-100
ns
Input instruction hold after PSEN
t
P XIX
0
-
0
-
ns
Input instruction float after PSEN
t
P XIZ
1)
1)
Interfacing the GMS90C320 to devices with float times up to 75 ns is permissible. This limited bus contention will not cause any damage
to port 0 Drivers.
-
63
-
t
C LC L
-20
ns
Address valid after PSEN
t
P XA V
1)
75
-
t
C LC L
-8
-
ns
Address to valid instruction in
t
A VIV
-
302
-
5t
C LC L
-115
ns
Address float to PSEN
t
A ZP L
-10
-
-10
-
ns