background image

 

HY12S65 
HY-IDE Hardware User Manual 

                                                           

 

© 2012 HYCON Technology Corp 

www.hycontek.com

         

 APD-HYIDE011-V02_EN 

page17

 

3.3. Circuit 

Please refer to Figure 18 in below. 

 

Figure 18 

1

2

3

4

5

6

A

B

C

D

6

5

4

3

2

1

D

C

B

A

T

itl

e

Nu
m

be

r

R

ev

isi

on

Si

ze

C

Da
te

:

19-
Jun-
2012

She

et    o

File

:

Y

:\M

y

D

es

ig

n.

ddb

Dr
aw

n B
y

:

VP
P

/R

ST

82

SEG11

2

SEG12

3

SEG13

4

SEG14

5

PT3.7/CM PO

6

PT3.6/CNT

7

PT2.3/TM CKI

8

PT2.2/PWM/PFD

9

PB4

58

PB3

59

PB2

60

PB1

61

PB0

62

FTP

63

FTN

64

RLU

65

RLD

66

PA6

67

PA5

68

PA4

69

PA3

70

PA2

71

PA1

72

PA0

73

AGND

75

AC
M

76

PT2.0/XTO

11

VL
C

D

84

CO
M

0

85

CO
M

2

87

CO
M

3

88

NC

89

NC

90

SE
G

9

100

H

Y

1

2S

6

5_
LQ

F

P

100

PT3.5/PB5

57

PT2.4/CM P0

56

PT2.5/CM P1

55

PT2.6/CM P2

54

PT2.7/CM P3

53

PT1.0/INT0/PSCK

52

PT
1.4

/T

X

48

P

T1.

5/S
D

O

47

PT
1.6

/S

CK

46

VG
G

78

CA

79

CB

80

VS
S

81

CO
M

1

86

SE
G

0

91

SE
G

1

92

SE
G

2

93

SE
G

3

94

ICE_DA3

24

ICE_DA4

25

IC

E_

D

A

7

28

IC

E_

A

D

R

0

29

IC

E_

A

D

R

1

30

IC

E_

A

D

R

2

31

IC

E_

A

D

R

3

32

IC

E_

A

D

R

4

33

IC

E_

A

D

R

5

34

IC

E_

A

D

R

6

35

IC

E_

A

D

R

7

36

IC

E_

A

D

R

8

37

IC

E_

A

D

R

9

38

IC

E_

A

D

R

10

39

IC

E_

A

D

R

11

40

IC

E_

A

D

R

12

41

IC

E_

A

D

R

13

42

IC

E_

A

D

R

14

43

IC

E_

A

D

R

15

44

PT
1.7

/B

Z/P

SD

O

45

PT2.1/XTI

10

VD
D

A

77

VDD_ICE

12

VSS

13

ICE_SDI

14

ICE_SDO

15

ICD_SCK

16

ICE_CS

17

ICE_CS0

18

ICD_RD

19

ICE_WE

20

ICE_DA0

21

ICE_DA1

22

ICE_DA2

23

IC

E_

D

A

5

26

IC

E_

D

A

6

27

P

T1.

3/R
X

/T

ST

49

P

T1.

2/S
D

I

50

PT1.1/INT1/PSDI/SCE

51

REFO

74

SEG10

1

VD
D

83

SE
G

4

95

SE
G

5

96

SE
G

6

97

SE
G

7

98

SE
G

8

99

U4

HY
12S
65

_D
A7

_A
DR
0

_A
DR
14

_A
DR
14

_A
DR
12

_A
D

R

11

_A
DR
11

_A
DR
13

_A
D

R

13

_A
D

R

10

_A
D

R

10

_A
DR
10

_A
D

R

9

_A
D

R

9

_A
DR
9

_A
D

R

8

_A
D

R

8

_A
DR
8

_A
DR
7

_A
DR
7

_A
DR
6

_A
DR
6

_A
DR
5

_A
DR
5

_A
DR
4

_A
DR
4

_A
DR
3

_A
DR
3

_A
DR
2

_A
DR
2

_A
DR
1

_A
DR
0

_D
A

7

_D
A

7

_D
A

6

_D
A

6

_D
A6

_D
A

5

_D
A

5

_D
A5

_D
A

4

_D
A

4

_DA4

_D
A

3

_D
A

3

_DA3

_D
A2

_DA2

_D
A1

_DA1

_D
A0

_DA0

_C
SR

AM
_S

_C
SS

B

M

_C
SR

AM

_R
D

_R
D

_RD
_WE

_W
E

_W
E

_V

SS_
ra

m

VD
D_ba

t

VD
D_ba

t

_S

BM

-S

EL

_S

BM

-S

EL

_C
S

SB
M

 M
em

or

y

P

ro

gr

am M

emo
ry

A5

5

A6

4

A7

3

A8

25

A9

24

A1
0

21

A1
1

23

A1
2

2

A1
3

26

A1
4

1

I/

O

0

11

I/

O

1

12

I/

O

2

13

I/

O

3

15

I/

O

4

16

I/

O

5

17

I/

O

6

18

I/

O

7

19

CE

20

A0

10

OE

22

A1

9

A2

8

A3

7

A4

6

WE

27

GN
D

14

VC
C

28

U7

622
56

C2
1

0.

1uF

1

2

C2
0

0.

1uF

C2
2

0.

1uF

VD
D_ba

t

VD
D_ba

t

_V

SS_
ra

m

8

9

10

U5
C

740
0

1

2

3

U5
A

74

00

5

6

4

U5
B

74

00

14

7

11

12

13

U5
D

740
0

_V
SS

_r

am

_V

SS_
ra

m

_V
SS

_r

am

_A
DR
1

VD
D_ba

t

VD
D

A5

5

A6

4

A7

3

A8

25

A9

24

A1
0

21

A1
1

23

A1
2

2

A1
3

26

A1
4

1

I/

O

0

11

I/

O

1

12

I/

O

2

13

I/

O

3

15

I/

O

4

16

I/

O

5

17

I/

O

6

18

I/

O

7

19

CE

20

A0

10

OE

22

A1

9

A2

8

A3

7

A4

6

WE

27

GN
D

14

VC
C

28

U8

622
56

_V
SS

_r

am

_V
SS

_r

am

_V

SS_
ra

m

_V

SS_
ra

m

1

1

VI
N

VD
D_b

at

VD
D_i

_A
DR
12

_A
DR
7

_A
DR
6

_A
DR
5

_A
DR
4

_A
DR
3

_A
DR
2

_A
DR
1

_A
DR
0

_D
A2

_D
A1

_D
A0

_V

SS_
ra

m

*

. IC
E

 Mem

o

ry

 N

E

T

VD
D_ba

t

VD
D_ba

t

1

2

3

4

5

6

S

J1

4

PS
2-6

PI

N

_V
C

C

_r

am

_V
SS

_r

am

_V

SS_
ra

m

_S

D

I

_S

D

O

_S

CK

_S

CS

R5
5

47K

R5
4

47K

R5
3

47K

_V
C

C

_r

am

1

2

3

6

5

4

S5

Po
w

er S

el

V

D

D_ba

t

1
2
3

J8

SB
M

 Se
l

1
2
3

J9

CS
 S

el

1

2

J1

1

VD
D_B

at

VD
D_ba

t

VI
N

_CS

_VSS_ram

C2
3

1uF

_V

SS_
ra

m

VD
D_ba

t

_SCS

_SCK

_SDO

_SDI

_V

CC_

ram

1
2
3
4
5
6

J1

3

IC

E S

ig

na

l

C5

C4

AG
ND

P4

Vo
l/O
hm
/C

ap

/DT

P1

CO
M

P2

mA
/u

A

P3

A

R3
1

R2
9

R2
8

R2
7

R3
0

R3
4

PB
0

R2
5

PB
3

R2
6

PB
1

R2
2

R2
3

R2
4

R3
3

R3
2

10M

 0.

7%

J4

JU
M

P

J6

Vo
l/Ohm

/C

ap

/DT

JU
M

P

1

2

3

J3

Cu
rr

en

t

uA

mA

1.11

M 0

.1%

101

K  0

.1%

10

K  0. 1%

1K  0

.1%

0.

1uF

100

900

K

10

K

10

K

99

0.

99

0.

01

RLD

PT
C

1

PT
C

B

2

C

1

E

3

Q3

901
3

B

2

C

1

E

3

Q4

901
3

C1
7

10M

104

RL
U

CO
M

CO
M

CO
M

VD
D

R9

RX

TX

R1
0

VD
D

1

6

2

7

3

8

4

9

5

RS
1

D5

R1
1

D2

PC
_T

X

D

PC
_R

X

D

IG
N

D

IG
N

D

Q1

R4
4

R4
3

IV
+

D3

IV
-

R4
5

IV
-

Q2

D4

R4
6

D6

D7

D8

D9

C1
8

IG
N

D

C1
9

IV
-

IV
+

Ph
o

to

 RS

23
2

P

1

N

2

C

4

E

3

U2

P

1

N

2

C

4

E

3

U3

1N
4148

1N
4148

1N
4148

1N
4148

10

uF

10

uF

1N
4148

1N
4148

1N
4148

50

0R

500
R

1N
4148

500
R

10k

500
R

6.

8k

270
R

P

C817

PC
81

7

R5
1

100

K

COM

PB
1

J7

HZ

JU
M

P

CN
T

C7

R3
5

RL
D

1u

1M

SEG21

24

SEG20

23

SEG19

22

SEG18

21

SEG17

20

SEG16

19

SEG15

18

SEG14

17

SEG13

16

SEG12

15

SEG11

14

SEG10

13

SEG9

12

SEG8

11

SEG7

10

SEG6

9

SEG5

8

SEG4

7

SEG3

6

SEG2

5

CO
M0

1

CO
M1

2

CO
M2
/SE

G

0

3

CO
M3
/SE

G

1

4

L

CD_20

*4

J1

0

L

CD_20

*4

B

U

ZZ
ER
1

BZ

Y1

R3
9

C1
6

C1
5

15p
F

1M

15p
F

4M
hz

C1
4

C1
1

C1
0

C1
2

XIN
XOUT

XO
UT

XI
N

BZ

TX

RX

C1
3

1M

AV
SS

AV
SS

C6

功能


1

2

3

4

8

7

6

5

S4

Fu

nc

tion
1

SW
1

Hz
 %

1

SW
2

SW

SW
3

HO
L

D

1

SW
6

R

A

NGE

1

SW
5

RE
L

1

SW
4

M

A

X/M

IN1

SW
7

BA
CK
L

IG

H

T1

SW
8

KE
Y1

KE
Y2

KE
Y5

KE
Y6

KE
Y4

KE
Y3

KEY1
KEY2

CO
M

0

CO
M

1

CO
M

2

CO
M

3

CO
M

0

CO
M

1

CO
M

2

CO
M

3

SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14

SE
G

0

SE
G

1

SE
G

2

SE
G

3

SE
G

4

SE
G

5

SE
G

6

SE
G

7

SE
G

8

SE
G

9

SEG10
SEG11
SEG12
SEG13
SEG14

CNT

CMPO

PB0
PB1
PB1
PB3
PB4
PB5

RLU

PA0
PA1
PA2
PA3
PA4
PA5
PA6

CMP0

CMP1

CMP2

CMP3

CMP0
CMP1
CMP2

R3
7

R3
8

C8

EEP

R

O

M

A0

1

A1

2

A2

3

VS
S

4

SD
A

5

SC
L

6

WP

7

VD
D

8

U9

VD
D

II

C_

SD

A

II

C_

SC

L

IIC_SDA
IIC_SCL

0.

1uF

10

k

24C
02

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

JP

3

LC
D

COM 0

COM 1

COM 2

COM 3

SEG0

SEG1

SEG2

SEG3

SEG4

SEG5

SEG6

SEG7

SEG8

SEG9

SEG10

SEG11

SEG12

SEG13

SEG14

GN
D

VD
D

RS
T

0.

1U

F

1U
F

1U
F

0.

1U

F

1u

VD
D

C9

R3
6

100
k

AV
SS

R4
8

AV
SS

KE
Y3

KE
Y4

KE
Y5

PB0

PB1

PB1

PB3

PB4

1

2

3

4

5

6

J5

PB
x

PB5

1

2

J1

2

CN
T

CNT
CMPO

D1

1N

4001

Ba
tt

CO
M

1

3

ON
1

5

OF
F1

1

CO
M

2

4

ON
2

6

OF
F2

2

S3

JP

1

VB
AT

JP

2

VS
SB

AT

R4
0

100
K

R4
1

42.
2K

R4
2

100
K

C2

10u
F

C3

10u
F

C1

0.

1uF

GS
2612

EN

1

IN

2

OU
T

3

AD
J

4

GN
D

5

GN
D

6

GN
D

7

GN
D

8

U1

VD
D_ba

t

VD
D

EX
T

3V

*.

 P

O

W

E

R

 N

E

T

1

2

3

J2

VD
D S
el

1
2

J1

Cu
rr

en

t te

st

R4
9

_V
SS

_r

am

1

2

3

4

5

6

7

8

9

10

11

12

JP

4

SP
I

1
2

J1

5

Po
w

er

KE
Y

3

KE
Y

5

KE
Y

4

KE
Y

2

VD
D

C2
4

CMP3

CO
M

點代

表直

接拉

AG
N

D

CO
M

表直

接拉

AG
ND

CO
M

點代

表直

接拉

AG
ND

V0
4 c
ha

ng

e

R5

R6

OP
E

N

0

1uF

27n
F

KE
Y6

CM
P

O

CM
P

3

R4

R1
2

R1
3

R1
4

R1
5

R1

R2

R3

20K

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

S1

CM
P

0

20K

20K

20K

20K

20K

20K

20K

CM
P

2

CM
P

0

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

S2

CM
P

1

CM
P

1

HY
12

S6
5 I

C

E

V0
4

A1
000
4

1u

10n

P

T1.

0(

IN

)

P

T1.

1(

IN

)

P

T1.

2(

IN

)

P

T1.

5(

IN

/O

U

T

)

P

T1.

6(

IN

/O

U

T

)

P

T3.

7(

IN

/O

U

T

) o

r P

T

2.

7(

IN

/O

U

T

)

P

T2.

7(

IN

/OU

T

)

PT2.4

PT2.5

PT2.6

PT2.7

PT
2.4

PT
2.5

PT
2.6

P

T3.

7(

IN

/OU

T

)

SD
I(

P

T

1.2

)

SC

K

(P

T1.

6)

SD

O(
P

T1.

5)

SC
S(

P

T

1.1

)

B

2

C

1

E

3

Q6

901
3

B

2

C

1

E

3

Q5

901
3

J1

6

Vo
l/Ohm

/C

ap

/D

T

JU
M

P

R7

1M

VD
D

PT
C

2

PT
C

MO
V

1

TV
R

MO
V

2

TV
R

MO
V

3

TV
R

VI
N

VI
N

.

Summary of Contents for HY12S65

Page 1: ...HY12S65 HY IDE Hardware User Manual 2012 HYCON Technology Corp www hycontek com APD HYIDE011 V02_EN...

Page 2: ...able of Contents 1 4 HY IDE STRUCTURE 2 5 HY IDE USB CONTROL BOARD 2 1 5 Diagram 2 2 6 Circuit Description 3 7 HY IDE ICE BOARD 3 1 7 Diagram 3 2 8 Circuit Description 3 3 17 Circuit 4 18 SIMPLE ERROR...

Page 3: ...that of package tolerance HYCON Technology Corp assumes no responsibility for equipment failures that resulted from using products at values that exceed even momentarily rated values listed in product...

Page 4: ...Control Board ICE Board and Target Board that can emulate function and performance of HY12P series products Through PC connection HY IDE can carry out emulation debugging program etc function as illus...

Page 5: ...Control Board 2 1 Diagram HY IDE USB control board is the bridge that connects PC and HY IDE ICE Board Users can emulate HY11P Series products function and implement programming OTP products in the en...

Page 6: ...of HY12S65 PIN 2 ICESDI connects to ICE_SDI of HY12S65 PIN 3 ICESCS connects to ICE_CS of HY12S65 PIN 4 VDD connects to ICE_VCC of HY12S65 PIN 5 ICESCK connects to ICE_SCK of HY12S65 PIN 6 VSS connect...

Page 7: ...ICESDO 1 2 3 5 6 VSS ICESCK ICEC ICESDI VDD S5 VDD_bat VIN VDD_i SRAM SRAM J14 Y1 R27 HY12S65 R39 C16 C15 U5 U8 U7 ON 2 1 J11 VIN VDD_bat U4 4 J2 2 3 1 EXT 3V 2 1 J1 1 JP1 VBAT 1 JP2 VSSBAT 2 1 Batt G...

Page 8: ...connected though HY IDE ICE Board Batt JP1 JP2 and the switch of VDD_bat and VDD_i must be turned to OFF J11 Can set up whether to short VIN and VDD_bat U7 U8 SRAM J1 J2 Program capacity selection of...

Page 9: ...ched to OFF status first External power can be input from JP1 VBAT positive end VSSBAT negative end of HY IDE ICE Board and S3 is the power on off control J2 power select whether the system power pass...

Page 10: ...ER NET APD HYIDE011 V02_EN page10 VDD_bat VDD EXT 3V 1 2 3 J2 VDD Sel 1 2 J1 Current test VIN Figure 4 RST Circuit Please refer to Figure 5 in below Figure 5 JP4 SPI communication port as shown in Fig...

Page 11: ...1 C 4 N 2 E 3 U2 D6 D7 D8 D9 C18 IGND C19 IV IV P 1 C 4 N 2 E 3 U3 1N4148 1N4148 1N4148 1N4148 10uF 10uF 1N4148 1N4148 1N4148 500R 500R 1N4148 500R 10k 500R 6 8k 270R PC 817 PC 817 Figure 7 BUZZER1 Bu...

Page 12: ...19 COM 0 COM 1 COM 2 COM 3 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 Figure 10 The LCD specification of HY IDE ICE Board is molded by HYCON LCD symbols and pins...

Page 13: ...E ZERO A m K M V g 70mm 27mm 2 54mm 17 78mm 0 812mm 1 21 8 89mm PIN 1 2 3 4 5 6 7 8 9 10 11 I O COM1 COM2 COM3 COM4 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 PIN 12 13 14 15 16 17 18 19 20 21 I O SEG8 SEG9 S...

Page 14: ...6 C15 15pF 1M 15pF 4M hz XOUT XIN Figure 13 SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 Can use KEY1 KEY6 to carry out 8 sets key scan as shown in Figure 14 APD HYIDE011 V02_EN page14 Function1 SW1 Hz 1 SW2 SW SW...

Page 15: ...by resistors R1 R4 R12 R15 using comparator to form 16 sets key scan APD HYIDE011 V02_EN page15 R4 R12 R13 R14 R15 R1 R2 R3 20K 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 S1 CM P0 20K 20K 20K 20K 20K 20K...

Page 16: ...16 ICE_CS 17 ICE_CS0 18 ICD_RD 19 ICE_WE 20 ICE_DA0 21 ICE_DA1 22 ICE_DA2 23 ICE_DA5 26 ICE_DA6 27 PT1 3 RX TST 49 PT1 2 SDI 50 PT1 1 INT1 PSDI SCE 51 REFO 74 SEG10 1 VDD 83 SEG4 95 SEG5 96 SEG6 97 SE...

Page 17: ...D_bat _SCS _SCK _SDO _SDI _VCC_ram 1 2 3 4 5 6 J13 ICE Signal C5 C4 AGND P4 Vol Ohm Cap DT P1 COM P2 mA uA P3 A R31 R29 R28 R27 R30 R34 PB 0 R25 PB 3 R26 PB 1 R22 R23 R24 R33 R32 10M 0 7 J4 JUM P J6 V...

Page 18: ...r Detection 4 1 ICE cannot connect to software Simple error correction is described as follows when ICE cannot connect to software Hardware configuration IDE mode error detection Options Interface Set...

Page 19: ...ol Board is completely connected to PC through USB port and the regulated 3V voltage output functions normally Options ICE Test Click CK ALL and confirm VCC voltage is close to 3V When Control Board o...

Page 20: ...2 J1 and S3 switch turns to ON Using voltage meter to check whether there is a 3V voltage existed in between VDD PIN83 VSS PIN81 and also a 3V voltage in between ICE_VCC PIN12 VSS PIN81 If there is no...

Page 21: ...er to check whether there is a 3V voltage existed in between VDD PIN83 VSS PIN81 and also a 3V voltage in between ICE_VCC PIN12 VSS PIN81 If there is no such voltage existed please double check the Po...

Page 22: ...AM Data Input 80 in Address AA in Write Data and then click Write button Writing all data into SRAM Click Read button to read out all data Options ICE Test Program ROM Data Input 80 in Address 5AA5 in...

Page 23: ...IDE Hardware User Manual 2012 HYCON Technology Corp www hycontek com 5 Revision History Major differences are stated thereinafter Version Page Revision Summary V02 ALL First edition APD HYIDE011 V02_...

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