HP Vectra VL 5/00 series Technical Reference Manual Download Page 39 | Manualshive

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The video subsystem uses the PCI bus for data transfers between the processor and the video
subsystem, and has the following features:

•

100% compatible with IBM® VGA display standard

•

32-bit video memory access with 1 MB DRAM. This increases to 64-bit access when an
additional 1 MB DRAM is installed

•

Hardware acceleration of graphical user interface (GUI) operations

•

Support for up to 2 MB DRAM at 60 ns

•

Graphics resolutions of up to 1280 x 1024

•

Integrated 24-bit RAMDAC

•

Green PC power saving features

•

Standard and Enhanced Video Graphics Array (VGA) modes

•

DDC 1 compliant.

VIDEO MEMORY

The S3 Trio 765 64V+ integrated video subsystem has 1 MB of video DRAM preinstalled on
the system board, and provide two sockets for the installation of a pair of 512KB video DRAM
chips, giving a total of 2 MB video memory.

VIDEO MODES

The video subsystem is responsible for generating video data (which is placed in video
memory) to be sent to the display.

The following table details the standard VGA modes which are currently implemented in the
video BIOS. These modes are supported by standard BIOS functions; that is, the video BIOS
(which is mapped contiguously in the address range C0000h to C7FFFh) contains all the
routines required to configure and access the video subsystem.

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Summary of Contents for Vectra VL 5/00 series

Page 1: ...Technical Reference Manual Hardware and BIOS HP Vectra VL 5 xx series 4 PC and HP Vectra VL 5 xx MT series 4 PC December 1995 ...

Page 2: ...nce or use of this material Hewlett Packard assumes no responsibility for the use or reliability of its software on equipment that is not furnished by Hewlett Packard This document contains proprietary information which is protected by copyright All rights are reserved No part of this document may be photocopied reproduced or translated into another language without the prior written consent of He...

Page 3: ...NAMIC BRANCH PREDICTION 12 INSTRUCTION AND DATA CACHE 12 DATA INTEGRITY 13 PCI CHIP SET 13 PCI CACHE AND MEMORY CONTROLLER 82437FX 14 DATA PATH UNIT 82438FX 15 THE PCI ISA BRIDGE AND IDE CONTROLLER 82371FB 15 THE 82438FX AND 82371FB FEATURE SUMMARY 16 SUPER I O CHIP 17 NS PC87332VF FEATURE SUMMARY 17 FLEXIBLE DRIVE CONTROLLER FDC 17 SERIAL PARALLEL PORTS 18 GRAPHICS INTEGRATED VIDEO 18 IDE TO PCI ...

Page 4: ...D ERROR MESSAGES 32 POWER ON SELF TEST POST 32 SHADOW RAM 32 ERROR MESSAGES 34 BEEP CODES 36 5 THE ULTRA VGA VIDEO CONTROLLERS 37 THE MATROX MGA MILLENNIUM VIDEO ADAPTER BOARD 37 VIDEO MEMORY 37 AVAILABLE VIDEO RESOLUTIONS 37 VESA CONNECTOR 38 FURTHER INFORMATION 38 THE INTEGRATED ULTRA VGA VIDEO CONTROLLER 38 VIDEO MEMORY 39 VIDEO MODES 39 AVAILABLE BIOS VIDEO RESOLUTIONS 42 VESA CONNECTOR 43 DB1...

Page 5: ...SA Computers ISBN 0 201 57760 7 by Phoenix Technologies is available in many bookstores It can also be ordered directly from the publisher as follows In the U S A Call Addison Wesley in Massachusetts at 1 800 447 2226 and be prepared to give a credit card number and expiry date In Europe Send your request to Addison Wesley at the address given below and be prepared to give a credit card number and...

Page 6: ...ader of this manual HP Vectra VL 5 xx series 4 PC User s Guide supplied with PC HP Vectra VL 5 xx MT series 4 PC User s Guide supplied with PC HP Vectra VL 5 xx series 4 PC and HP Vectra VL 5 xx MT series 4 PC Familiarization Guide D3645 90901 HP Vectra PC Service Handbook 9th edition Available January 1996 The following Intel publication provides more detailed information Pentium Processor 241595...

Page 7: ...o 765 64V or 764 integrated on PCI bus or Matrox MGA Millennium video card Video memory 1 MB standard upgradable to 2 MB 1 MB standard upgradable to 2 MB Matrox Models 2 MB standard upgradable to 4 MB or 8 MB Enhanced IDE hard disk controller CMD PCI0640B Integrated on PCI bus dedicated for hard disk drives Integrated in chip set part of 82371FB multipurpose chip Integrated on PCI bus Primary chan...

Page 8: ...r tape drive Two connectors for 3 5 inch flexible disk drive or tape drive One connector for 5 25 inch flexible disk drive Maximum two devices connected simultaneously Accessory board slots on backplane One 16 bit ISA short 16cm 6 3 inch One 16 bit ISA full length One 32 bit PCI 16 bit ISA Combination full length One 32 bit PCI full length Three 16 bit ISA full length One 32 bit PCI 16 bit ISA Com...

Page 9: ...TURES The main features of the system board are supports Pentium processors of several different clock speeds 90 100 120 or 133 MHz and 150 and 166 MHz when available with accompanying voltage regulator module VRM a PCI bus video controller most models of the Vectra VL 5 xx series 4 have an integrated 64 bit Ultra VGA controller on the PCI bus S3 Trio 765 64V on D3xxxA models and S3 Trio 764 on D3...

Page 10: ...with the latest firmware using the Phlash exe program supplied with the firmware upgrade The system ROM contains the BIOS system BIOS video BIOS and low option ROM a power on hardware test that allows you to view the results of the diagnostics as well as a corrective action message error message utility menu driven SETUP with context sensitive help in US English only a keyboard mouse controller an...

Page 11: ... the Pentium without modification The Pentium processor contains all the features of the Intel 486 processor with the following added features which enhance performance Superscalar Architecture Floating Point Unit Dynamic Branch Prediction Instruction and Data cache Data Integrity Supports MultiProcessor Specification MPS 1 1 PCI bus architecture Advanced Power Management capability for reducing p...

Page 12: ... contents of the Branch Target Buffer BTB The BTB is a small cache which keeps a record of the last instruction and address used It uses this information to predict the way that the instruction will branch the next time it is used When it has made a correct prediction the branch is executed without delay thereby enhancing performance INSTRUCTION AND DATA CACHE The Pentium processor has separate co...

Page 13: ...processor and its interface PCI CHIP SET The chip set consists of three devices The PCI Cache and Memory Controller 82437FX Two Data Path Units 82438FX The PCI ISA bridge and IDE controller 82371FB The 82437FX and 82438FX2 devices provide the core cache and memory system architecture and the PCI interface Pentium Processor Host Bus 82438FX Data Path Unit 82438FX Data Path Unit Main Memory Level Tw...

Page 14: ... back External cache tags 32 byte line size Uses synchronous pipeline burst SRAM Supports 3 1 1 1 burst reads Write buffer Buffers all processor writes to main memory Buffers memory writes to PCI for selected memory regions Supports 3 1 1 1 write access timing The Pentium s internal cache has a 32 byte line size which is four times the width of the Pentium s host data bus Burst reads and writes by...

Page 15: ...head for processor to PCI accesses PCI bus arbiter Supports PCI bus arbitration for up to four masters Supports rotating priority scheme The Pentium s internal cache has a 32 byte line size which is four times the width of the Pentium s host data bus Burst reads and writes by the Pentium involve a full cache line and so require four back to back cycles to complete The first cycle in each burst of ...

Page 16: ...ce for 82371FB only Fully compatible with PCI specification Supports PCI to ISA ISA to PCI bus master cycle translations Supports programmable memory regions to provide fast positive decode for PCI master accesses Implements subtractive decoding for unclaimed PCI cycles Supports PCI to ISA posted memory writes Translates DMA transfers for PCI slaves Supports PCI address data parity generation and ...

Page 17: ...are compatible with the PC16550A and PC16450 MIDI compatible Bidirectional parallel port Enhanced Parallel Port EPP compatible Extended Capabilities Port ECP compatible Bidirectional under either software or hardware control Ability to multiplex FDC signals on parallel port pins for external FDD Includes protection circuit against damage caused when printer is switched on or operated at higher vol...

Page 18: ...eo Controller The S3 Trio 765 64V and S3 Trio 764 video controllers offer full compatibility with VGA In addition the features are enhanced beyond Super VGA by hardware which accelerates graphical user interface operation in environments such as Microsoft Windows or OS 2 NOTE The S3 Trio 765 64V and S3 Trio 764 video drivers are not compatible D3xxxA models use the S3 Trio 765 64V D3xxxB models us...

Page 19: ...peration of software applications user password administrator password system configuration protection power on prompt with user of administrator password power on keyboard and mouse lock with user password space bar power on protection feature can be disabled in SETUP communications port protection ports can be disabled in SETUP flexible disk drive protection disks can be read and or write protec...

Page 20: ...essory boards 4 5 A at 5 V 0 5 A at 12 V 0 1 A at 12 V Mini Tower Models Input voltage The Mini Tower VL 5 xx series 4 PCs are equipped with a 160 W continuous rated power supply This power supply requires an input voltage in the following range 100 127 Vac and 176 264 Vac at a frequency of 47 Hz to 63 Hz with manual switching between 115 and 230 V Heat Dissipation Maximum thermal dissipation 91 k...

Page 21: ... to 40 C Recommended Operating Temperature 59 F to 158 F 15 C to 30 C Storage Temperature 40 F to 158 F 40 C to 70 C Over Temperature Shutdown 122 F 50 C Operating Humidity 15 to 80 relative Storage Humidity 8 to 80 relative Operating Altitude 10000 ft 3100m max Storage Altitude 15000ft 4600m max NOTE Operating temperature and humidity ranges may vary depending upon the mass storage devices instal...

Page 22: ... OVERVIEW OF ADDRESS SPACE Peripheral devices accessory devices and system controllers are accessed via the system I O space which is not located in system memory space The 64 KB of addressable I O space comprises 8 bit and 16 bit registers called I O ports located in the various system components When installing an accessory board ensure that the I O address space selected is in the free area of ...

Page 23: ...oller 1 8 0020 0021 Interrupt Controller 1 8 0040 0043 Interval Timer 1 8 0060 0064 Keyboard Controller 8 0061 NMI Status and Control 8 0070 NMI Mask register RTC address 8 0071 RTC data 8 0081 0083 008F DMA Low Page register 8 0092 Alternate reset and A20 Function 8 0096 009F Internal Ports 8 00A0 00A1 Interrupt Controller 2 8 00C0 00DF DMA Controller 2 8 00F0 00FF Co processor error 0170 0177 Se...

Page 24: ...es of DMA transfer allowed are I O to memory and memory to I O I O to I O and memory to memory transfers are disallowed by the hardware configuration The following table summarizes how the DMA channels are allocated First DMA controller used for 8 bit transfers Channel Function 0 Available 1 Available or ECP mode for parallel port 2 Flexible disk I O 3 Available or ECP mode for parallel port Secon...

Page 25: ...condary channel of IDE controller IRQ3 0Bh Free if not used used for serial port IRQ4 0Ch Free if not used used for serial port IRQ5 0Dh Free if not used used for parallel port IRQ6 0Eh Flexible disk drive controller IRQ7 0Fh Free if not used used for parallel port IRQ 15 can be made available by disabling the secondary channel of the IDE controller in the SETUP program IRQ3 and IRQ4 can be made a...

Page 26: ...t the PC such as the BIOS version number the serial number the processor type and the size of the hard disk drive This information is stored in the Management Information Format Database or MIF Pointers are used to indicate the position of a table or a string value The following rules apply to pointers Pointers must never be zero For empty strings the pointer must point to a null zero value Far po...

Page 27: ...y the checksums Refer to Verifying the DMI Information Structure in this chapter 3 Locate the first sub structure table using the far pointer given in the DMI header 4 Walk through the tables to locate the desired table Each table is identified by a unique type The type is given by the first byte of the table The length of the table is given by the second byte The next table follows immediately af...

Page 28: ...ON STRUCTURE Before accessing the DMI tables the checksums must be verified to ensure the reliability of the information To calculate a checksum value of a structure do the following steps 1 Add together all the bytes of the structure 2 Convert the value to negative 3 Cast the value to a byte take the low byte There are two checksums one for the DMI header and another for the remaining DMI structu...

Page 29: ... variable Far pointer to string containing BIOS version number BIOS Starting Address Ah 2 bytes WORD variable Segment location of BIOS starting address i e E800h BIOS Release Date Ch 4 bytes DWORD variable Far pointer to string containing BIOS release date BIOS Characteristics 10h 4 bytes DWORD variable bit field Bit field value indicating which functions the BIOS supports BIOS ROM Size 14h 1 byte...

Page 30: ...cessor Max Speed 8h 2 bytes WORD variable Decimal value of maximum processor speed Example 66d for a 66 MHz processor Processor Upgrade Ah 1 byte ENUM Value indicating processor upgrade type 1 Other 2 Unknown 3 Daughter Board 4 ZIF Socket 5 Replaceable Piggy Back 6 None HP Specific DMI Sub Structure Structures Type 80h HP ID Field Offset Length Value Description Type 0h 1 byte 80h HP ID informatio...

Page 31: ... 0h 1 byte 84h HP system information table Length 1h 1 byte Eh Table length System Power on Time 02h 2 bytes variable Short pointer to string containing date and time of last boot Format ccyymmddHHMM The value indicates RTC has failed Base Memory Size 04h 2 bytes variable Size of base memory in kilobytes Extended Memory Size 06h 2 bytes variable Extended Memory size in 64 KB blocks HP BIOS Version...

Page 32: ...e POST does not detect when a slave hard disk drive HDD 1 or HDD 3 in the setup has been installed or changed SHADOW RAM On HP personal computers access to certain ROM data is enhanced by using shadow RAM During the POST the BIOS and other ROM data is copied into high speed shadow RAM The shadow RAM is addressed at the same physical location as the original ROM in a manner which is completely tran...

Page 33: ...terrupt Controller Test Tests the Interrupt masks the master controller interrupt path by forcing an IRQ0 and the industry standard slave controller by forcing an IRQ8 Test failure causes an error code to display Real Time Clock Test Checks the real time clock registers and performs a test that ensures that the clock is running Test failure causes an error code to display Memory Tests RAM Address ...

Page 34: ...well as any other serial ports Test failure causes an error code to display Hard Disk Drive Tests Hard Disk Controller Subsystem Test Tests for proper operation of the hard disk controller Test failure causes an error code to display The test does not detect hard disk replacement or changes in the size of the hard disk System Configuration Tests System Generation Initiation of the system generatio...

Page 35: ...Setup to update the configuration information The message should no longer be displayed Should the problem persist replace the battery Keyboard error Check that the keyboard is connected Resource Allocation Conflict PCI device 0079 on motherboard Clear CMOS Video Plug and Play interrupted or failed Re enable in Setup and try again You may have powered your PC Off On too quickly and the PC turned o...

Page 36: ...re 1 3 4 1 2C RAM failure 1 3 4 3 2E RAM failure on data bits in low byte of memory bus 1 4 1 1 30 RAM failure on data bits in high byte of memory bus 2 1 2 3 46 ROM copyright notice check failure 2 2 3 1 58 Unexpected interrupts test failure 1 2 98 Video configuration failure or Option ROMs checksum failure 1 B4 This does not indicate an error There is one short beep before system startup Values ...

Page 37: ...ation of graphical user interface GUI operations Support for up to 8 MB WRAM Window RAM at 60 ns Graphics resolutions of up to 1600 x 1200 Integrated 24 bit RAMDAC Green PC power saving features Standard and Enhanced Video Graphics Array VGA modes DDC 2B compliant VIDEO MEMORY The Matrox MGA Millennium has 2 MB of video WRAM window random access memory preinstalled on the video adapter board and h...

Page 38: ...d on the adapter board and is connected directly to the pixel data bus and the synchronization signals FURTHER INFORMATION For further information on the Matrox MGA Millennium video adapter board contact Matrox Electronic Systems Matrox Electronic Systems Ltd 1055 St Regis Blvd Dorval Quebec Canada H9P 2T4 Telephone 514 685 2630 Fax 514 685 2853 BBS 514 685 6008 THE INTEGRATED ULTRA VGA VIDEO CONT...

Page 39: ...aphics Array VGA modes DDC 1 compliant VIDEO MEMORY The S3 Trio 765 64V integrated video subsystem has 1 MB of video DRAM preinstalled on the system board and provide two sockets for the installation of a pair of 512KB video DRAM chips giving a total of 2 MB video memory VIDEO MODES The video subsystem is responsible for generating video data which is placed in video memory to be sent to the displ...

Page 40: ...00 16 70 31 5 25 175 0Eh VGA graph 640 x 200 16 70 31 5 25 175 0Fh VGA graph 640 x 350 b w 70 31 5 25 175 10h VGA graph 640 x 350 16 70 31 5 25 175 11h VGA graph 640 x 480 2 60 31 5 25 175 12h VGA graph 640 x 480 16 60 31 5 25 175 13h VGA graph 320 x 200 256 70 31 5 25 175 The extended modes supported by the video BIOS are Extended Mode No VESA Mode No Interface Type Resolu tion No of Colors Verti...

Page 41: ... 80 000 6Dh 105h graph 1024 x 768 256 85 68 7 95 000 6Eh 106h graph 1280 x 1024 16 45i 46 80 000 6Eh 106h graph 1280 x 1024 16 60 110 000 70h 110h graph 640 x 480 32 768 60 31 5 25 175 70h 110h graph 640 x 480 32 768 72 37 5 31 500 70h 110h graph 640 x 480 32 768 75 37 5 31 500 70h 110h graph 640 x 480 32 768 85 45 36 000 71h 111h graph 640 x 480 65 536 60 31 5 25 175 71h 111h graph 640 x 480 65 5...

Page 42: ...76h 116h graph 1024 x 768 32 768 75 60 2 80 000 76h 116h graph 1024 x 768 32 768 85 68 7 95 000 77h 117h graph 1024 x 768 65 536 43i 35 44 900 77h 117h graph 1024 x 768 65 536 60 48 9 65 000 77h 117h graph 1024 x 768 65 536 70 56 5 75 000 77h 117h graph 1024 x 768 65 536 75 60 2 80 000 77h 117h graph 1024 x 768 65 536 85 68 7 95 000 7Ch 120h graph 1600 x 1200 256 48 5i 62 00 67 000 AVAILABLE BIOS ...

Page 43: ...e VESA feature connector will disable the 1 MB video memory upgrade if one is installed Only the standard 1 MB of video memory will be used DB15 CONNECTOR PINOUT VIDEO CONTROLLER SUMMARY HP Vectra VL 5 xx Series 4 and HP Vectra VL 5 xx MT series 4 Video Controllers Integrated 64 bit Ultra VGA on PCI bus S3 Trio 765 64V or S3 Trio 764 64 bit Ultra VGA PCI video adapter board Matrox MGA Millennium H...

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