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M o d e l 5363 B
S e rvice
8-28
8-1 1 4 . Flowcha rt Ope ration
8-1 1 5 . T h e fol l o w i n g p a rag ra p h s descri be how the f l o wc h a rt can be u sed to dete rm i ne a
basic i d l e l o o p ope rati o n . Refe r to t h e deta i l e d f l o wc h a rt d ia g ra m s provided i n t h e b a c k of t h i s
secti o n .
8-1 1 6 . T h e M a i n P ro g ra m I d l e L o o p R o u t i n e F l o wc h a rt .
Fig ure
8 -9 ,
beg i n s w i t h c o m ma n d
C L R R MT C A L state 0 , w h i c h c lea rs a n d p resets t h e A 5 H P- I B I n te rface Asse m b l y . States 1
a n 2 c h ec k t h e sta t u s of t h e rea r p a n e l B N C j a c k s
X
a n d
Y .
I f e i t h e r of t h e se l i n e s i s p u l led l o w ,
g ro u n d , t h e prog ra m w i l l e x i t t o t h e
X - Y
s u b ro u t i n e . C o m m a n d L ATC H 8 state 3 a d d resses
o u t p u t 8 of t h u m bw h e e l selector. I f probe A is selected , t h e t h u m bw h e e l o u t p u t d ata l i ne A i s
p u l led h i g h b y resistor pac k A 1 R 1 30 , a n d fed a s a q ua l i f i e r b i t t o A 1 U 2 1 . Q u a l i f i e r , state 4
e xa m i nes t h i s b i t a n d see i n g h i g h , j u m ps to state 5 1 . C o m m a n d S ET STA R T C H AN H I state
51 sets c o m m a n d latch U26 p i n 5 h i g h , e n a b l i n g the sta rt d iffe re n t i a l FET pa i r i n Probe A .
State 52 i s a forced j u m p to state 6 w h e re, i n t u rn , STO P C h a n n e l Probe , STA R T S L O P E, a n d
STO P S L O P E a re d e tected a n d e n a b l ed i n t h e s a m e m a n n e r.
8-1 1 7 . States 1 5 t h ro u g h 20 se ri a l l y accept a n d l oad the STA R T C h a n n e l voltage i nto voltage
d ri ve rs U5, U2, and U4, respe c t i v e l y , o n A2 D A C Asse m b ly. States 21 t h ro u g h 25 dete rm i ne
a n d set t h e pol a rity f o r t h e sta rt v o l ta g e . C o m m a n d LOAD STA R T voltage t o t h e STA R T
c h a n n e l S a m p l e a n d H o l d R ef e rence A m p l i f i e r A 1 U 8 . T h i s c o m m a n d i s repeated fo u r t i m e s i n
o rd e r to a l l o w suff i c i e n t ti me f o r sa m p l i n g c a pa c i t o r A 1 C5 to c o m p l et e l y c h a rge to t h e l eve l of
the a p p l ied DAC voltage.
8-1 1 8 . State 29 exa m i nes A 1 U 2 1 pin 6 to dete r m i ne i f A5 H P- I B I n t e rface Asse m b l y has
req ue sted R MTCAL re m ote ca l i b ra t i o n ' . State 30 c he c k s the R E M O T E q ua l i f i e r l i n e , A1 U 2 1
p i n 3 ' . I f R EM O T E i s h i g h t h e state m ac h i n e w i l l j u m p t o state 3 3 . I f R E MO T E i s l o w , i n d icati n g
l oc a l o p e rat i o n , t h e state m a c h i n e c o n t i n ue s t o state 3 1 . States 3 1 a n d 32 exa m i n e t h e f ro n t
p a n e l level switc h , to dete rm i ne i f a l e ve l c a l i b ra t i o n h a s b e e n req uested l oc a l l y . A l eve l
c a l i b rate req u e st e i t h e r re m o t e l y state 1 29 o r l o ca l l y ' state 32 w i l l e x i t to t h e c a l i b rati o n
s u b ro u t i n e state 1 6 1 ' . Othe rw i s e , t h e f l o wc h a rt c o n t i n ue s to state 3 3 a n d e xa m i n e s t h e
T I M ER q ua l i f i e r A1 U 2 1 p i n 9 ' . T h e status of t h e T I M ER d ete r m i n e s w h e th e r t h e Tri g g e r L i g h t
s u b ro u t i n e i s e n t e red o r b ypassed . I f t h e T I M E R q ua l i f i e r i s h i g h , t h e Tri g g e r L i g h t s u b ro u t i n e
i s bypassed a n d the prog ra m c o n t i n ues to state 34, R E M O T E .
8-1 1 9 . State 34 e xa m i nes the R E M O T E q ua l i f i e r l i ne , a n d i f t r u e , bypa sses the f ro n t p a n e l
s w i t c h q u a l i f i e r r o u t i ne ' states 35 a n d 36 . States 35 a n d 36 s e l e c t a n d e xa m i n e t h e A d ata l i n e
q ua l i f i e r wh i c h l o o ks at t h e posi t i o n o f t h e T I M E Z E R O f r o n t p a n e l t o g g l e s w i tc h . States 3 7
th rou g h 50 seria l l y select a n d l oad t h e STO P c h a n ne l voltages a n d p o l a rity i n e xactl y t h e s a m e
m a n n e r as t h e STA R T c h a n n e l . T h i s c o m p l etes a b a s i c i d le l o o p a n d t h e prog ra m n o w ret u r n s
t o state 1 to beg i n ag a i n . A s i m pl i f i ed d ia g ra m o f t h e 536 3 B m a i n p rog ra m i d le l o o p a n d
s u b ro u t i nes i s g i ve n i n
Fig ure
8 - 7 .
8 -1 20. Flowchart S u b routines
8 -1 2 1 . T he m a i n prog ram i d l e l oop c o n t i n u a l l y i n p u t s data and e xa m i ne s q ua l i f i e rs . Ba sed
on the q ua l i f i e r i n p u t s , the l o o p c a n c o n t i n ue t h ro u g h t h e prog ra m o r b ra n c h to a n y of t h e
fol l owi n g major s u b ro u t i nes:
1 .
X - Y
Exte r n a l P rog ra m
2 . Ca l i b rat i o n
3 . Ca l i b ra t i o n Error
4 . Tri g g e r L i g h t
5 . T i m e Z e ro
Summary of Contents for 5363B
Page 52: ......
Page 116: ...Figure 8 9 MAIN PROGRAM I DLE LOOP ROUTI NE FLOWCHART Sheet 1 of 5 See Page 8 39 ...
Page 118: ...Figure 8 9 MAIN PROG RAM I DLE LOOP ROUTI N E FLOWCHART Sheet 2 of 5 See Page 8 41 ...
Page 120: ...Figure 8 9 MAIN PROG RAM I DLE LOOP R O U T I N E FLOWC HART Sheet 3 of 5 See Page 8 43 ...
Page 122: ...Figure 8 9 MAIN PROG RAM I DLE LOOP ROUTIN E FLOWCHART Sheet 4 of 5 See Page 8 45 ...
Page 126: ...Figure 8 1 0 HP IB PROGRAM HAN DSHAKE R OUTI N E FLOWCHART Sheet 1 of 4 See Page 8 49 ...
Page 128: ...Figure 8 1 0 HP IB PROG RAM HAN DSHAKE ROUTINE FLOWCHART Sh eet 2 of 4 See Page 8 5 1 ...
Page 130: ...Figure 8 1 0 HP I B P R O G RAM HAN DSHAKE ROUTI N E FLOWCHART Sheet 3 of 4 See Page 8 53 ...
Page 132: ...I I G6 r ciJ I I I I i I I I loY 8 I _ x __ c I I j ...
Page 134: ... 1 J 0 0 3 RI I H I H tt t tTd ci ...
Page 137: ... W2 Figure 8 1 1 A 1 Motherboard Schematic Diagram Sheet 2 of 2 ...
Page 138: ......
Page 139: ... Model 53638 ServIC8 Figure 8 1 1 AI uclherboard Schematic Sheet if 2 8 59 ...
Page 142: ... Pl Figure 8 1 2 A2 Digital la Analog Converter Assembly ...
Page 145: ... 3 A3 Calibrate Assembly Figure 8 1 ...
Page 150: ... 1 F 6 O 3000 2V I V 1000 Ilk L j 0104 t r r 1 3 I _ _ HH t t1 14 t PIO 4fOO PI roc r I NC ...
Page 154: ... TI P BODY TIP P R O B E Figure 8 1 6 A 6 A 7 Probe A ssembly m ...