QSG-3717
HOLT INTEGRATED CIRCUITS
4
Board RESET
A RESET pushbutton is provided. A DIP switch is also provided to continuously assert processor RESET.
For normal operation ensure SW2 – 4 (MRST) is in the open position, otherwise the MCU is held in the
reset state.
Main Board Jumpers
Some jumpers do not apply to the HI-3717 so they will typically be shown as NA.
JP1 - NA, JP2 - NA
JP3 - VDD jumper to J5 VLOGIC. Remove JP3 to measure ICC.
JP4 - NA, JP5 - NA, JP7 - NA.
Demo Mode Selection
Mode2
Mode1
Mode0
MODE NUMBER
DEMO MODE
0
0
0
0
Board Test
0
0
1
1
Transmit Receive Mode
0
1
0
2
Transmit Receive Mode SELF-TEST
0
1
1
3
Transmit Special Mode
1
0
0
4
Receive Mode Compare Off
1
0
1
5
Receive Mode Compare On
1
1
0
6
N.A.
1
1
1
7
Serial Commands
(0=CLOSED, 1=OPEN)
OPT1 switch Receiver Mode
Open = BPRZ (Bipolar Return-to-Zero) Receive mode.
Closed = HBP (Harvard Bi-phase) Receive mode.
