Hitachi HTS541680J9SA00 - Travelstar 80 GB Hard Drive Page 37 Specifications Download | Manualshive

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Travelstar 5K160 (SATA) Hard Disk Drive Specification

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6.7

Identification labels

The following labels are affixed to every drive:

A label which is placed on the top of the head disk assembly containing the statement "Made by

Hitachi" or equivalent, part number, EC number, and FRU number.

A bar code label which is placed on the disk drive based on user request. The location on the disk

drive is to be designated in the drawing provided by the user.

Labels containing the vendor's name, disk drive model number, serial number, place of manufacture,

and UL/CSA logos.

The presence of labels containing jumper information depends on the customer.

6.8

Electromagnetic compatibility

When installed in a suitable enclosure and exercised with a random accessing routine at maximum data
rate, the drive meets the following worldwide electromagnetic compatibility (EMC) requirements:

・

United States Federal Communications Commission (FCC) Rules and Regulations (Class B),

Part 15. RFI Suppression German National Requirements

・

RFI Japan VCCI, Requirements of HITACHI products

・

EU EMC Directive, Technical Requirements and Conformity Assessment Procedures

6.8.1

CE Mark

The product is certified for compliance with EC directive 89/336/EEC. The EC marking for the certification
appears on the drive.

6.8.2

C-Tick Mark

The product complies with the Australian EMC standard "Limits and methods of measurement of radio
disturbance characteristics of information technology equipment, AS/NZS 3548:1995 Class B."

6.8.3

BSMI Mark

The product complies with the Taiwan EMC standard “Limits and methods of measurement of radio
disturbance characteristics of information technology equipment, CNS 13438 Class B.”

6.8.4

MIC Mark

The product complies with the Korea EMC standard. The regulation for certification of information and
communication equipment is based on “Telecommunications Basic Act” and “Radio Waves Act” Korea
EMC requirment are based technically on CISPR22:1993-12 measurement standards and limits. MIC
standards are likewise based on IEC standards.

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Summary of Contents for HTS541680J9SA00 - Travelstar 80 GB Hard Drive

Page 1: ...cation 1 167 Hitachi Global Storage Technologies Hard Disk Drive Specification Hitachi Travelstar 5K160 2 5 inch SATA hard disk drive Models HTS541616J9SA00 HTS541612J9SA00 HTS541680J9SA00 HTS541660J9SA00 HTS541640J9SA00 Revision 1 2 12 July 2006 ...

Page 2: ...hi may make improvements or changes in any products or programs described in this publication at any time It is possible that this publication may contain reference to or information about Hitachi products machines and programs programming or services that are not announced in your country Such references or information must not be construed to mean that Hitachi intends to announce such Hitachi pr...

Page 3: ...5 5 4 WRITE safety 5 5 5 Data buffer test 5 5 6 Error recovery 5 5 7 Automatic reallocation 5 5 8 ECC 5 6 SPECIFICATION 5 6 1 Environment 5 6 2 DC power requirements 5 6 3 Reliability 5 6 4 Mechanical specifications 5 6 5 Vibration and shock 5 6 6 Acoustics 5 6 7 Identification labels 5 6 8 Electromagnetic compatibility 5 6 9 Safety 5 6 10 Packaging 5 6 11 Substance restriction requirements 5 7 EL...

Page 4: ...ommands 5 13 2 Data Out Commands 5 13 3 Non Data Commands 5 13 4 DMA Data Transfer Commands 5 13 5 First parity DMA Commands 5 14 COMMAND DESCRIPTIONS 5 14 1 Check Power Mode E5h 98h 5 14 2 Device Configuration Overlay B1h 5 14 3 Execute Device Diagnostic 90h 5 14 4 Flush Cache E7h 5 14 5 Flush Cache Ext EAh 5 14 6 Format Track 50h Vendor Specific 5 14 7 Format Unit F7h Vendor Specific 5 14 8 Iden...

Page 5: ...8 Set Multiple C6h 5 14 39 Sleep E6h 99h 5 14 40 S M A R T Function Set B0h 5 14 41 Standby E2h 96h 5 14 42 Standby Immediate E0h 94h 5 14 43 Write Buffer E8h 5 14 44 Write DMA CAh CBh 5 14 45 Write DMA Ext 35h 5 14 46 Write DMA FUA Ext 3Dh 5 14 47 Write FPDMA Queued 61h 5 14 48 Write Log Ext 3Fh 5 14 49 Write Long 32h 33h 5 14 50 Write Multiple C5h 5 14 51 Write Multiple Ext 39h 5 14 52 Write Mul...

Page 6: ...d 90h 5 Figure 29 Flush Cache Command E7h 5 Figure 30 Flush Cache EXT Command EAh 5 Figure 31 Format Track Command 50h 5 Figure 32 Format Unit Command F7h 5 Figure 33 Identify Device Command ECh 5 Figure 34 Identify device information 5 Figure 35 Identify device information Continued 5 Figure 36 Identify device information Continued 5 Figure 37 Identify device information Continued 5 Figure 38 Ide...

Page 7: ...re 90 Log sector addresses 5 Figure 91 Device Attribute Data Structure 5 Figure 92 Individual Attribute Data Structure 5 Figure 93 Status Flag Definitions 5 Figure 94 Device Attribute Thresholds Data Structure 5 Figure 95 Individual Threshold Data Structure 5 Figure 96 SMART Log Directory 5 Figure 97 S M A R T error log sector 5 Figure 98 Error log data structure 5 Figure 99 Command data structure...

Page 8: ...tal condition 5 Table 13 Magnetic flux density limits 5 Table 14 DC Power requirements 5 Table 15 Power consumption efficiency 5 Table 16 Physical dimensions and weight 5 Table 17 Random vibration PSD profile breakpoints operating 5 Table 18 Swept sine vibration 5 Table 19 Random Vibration PSD Profile Breakpoints nonoperating 5 Table 20 Operating shock 5 Table 21 Nonoperating shock 5 Table 22 Weig...

Page 9: ... 40 HTS541640J9SA00 40 9 5 5400 Part 1 of this document beginning on page 5 defines the hardware functional specification Interface specification is separately issued 1 1 Abbreviations Abbreviation Meaning 32 KB 32 x 1024 bytes 64 KB 64 x 1024 bytes inch A amp AC alternating current AT Advanced Technology ATA Advanced Technology Attachment Bels unit of sound power BIOS Basic Input Output System C ...

Page 10: ...SO International Standards Organization KB 1 000 bytes Kbit mm 1 000 bits per mm Kbit sq mm 1000 bits per square mm KHz kilohertz LBA logical block addressing Lw unit of A weighted sound power m meter max or Max maximum MB 1 000 000 bytes Mbps 1 000 000 Bit per second Mb sec 1 000 000 Bit per second MB sec 1 000 000 bytes per second MHz megahertz MLC Machine Level Control mm millimeter ms millisec...

Page 11: ...H relative humidity RH per cent relative humidity RMS root mean square RPM revolutions per minute RST reset R W read write sec second Sect Trk sectors per track SELV secondary low voltage S M A R T Self monitoring analysis and reporting technology Trk track TTL transistor transistor logic UL Underwriters Laboratory V volt VDE Verband Deutscher Electrotechniker W watt 3 state transistor transistor ...

Page 12: ... cover the breathing hole on the top cover See figure below Do not touch the interface connector pins or the surface of the printed circuit board The drive can be damaged by shock or ESD Electric Static Discharge Any damages incurred to the drive after removing it from the shipping package and the ESD protective bag are the responsibility of the user 1 4 Drive handling precautions Do not press on ...

Page 13: ...Enhanced ECC 10 bit 40 symbol non Interleaved Read Solomon code Non interleave On The Fly correction Included 2 symbol system ECC Segmented Buffer with write cache 8192 KB Upper 441 KB is used for firmware Fast data transfer rate up to 1 5 Gbit s Media data transfer rate max 540 Mb s Average seek time 11 ms for read Closed loop actuator servo Embedded Sector Servo Rotary voice coil motor actuator ...

Page 14: ...Travelstar 5K160 SATA Hard Disk Drive Specification 14 167 Part 1 Functional Specification ...

Page 15: ...nctions SATA Interface Protocol Embedded Sector Servo No ID TM formatting Multizone recording Code 100 106 System ECC Enhanced Adaptive Battery Life Extender 3 2 Head disk assembly data The following technologies are used in the drive Femto Slider Perpendicular recording disk and write head GMR head Integrated lead suspension ILS Load unload mechanism Mechanical latch ...

Page 16: ...3 16 383 Number of Sectors 312 581 808 234 441 648 Total Logical Data Bytes 160 041 885 696 120 034 123 776 Description HTS541680J9SA00 HTS541660J9SA00 HTS541640J9SA00 Physical Layout Bytes per Sector 512 512 512 Sectors per Track 480 1272 480 1272 480 1272 Number of Heads 2 2 1 Number of Disks 1 1 1 Logical Layout Number of Heads 16 16 16 Number of Sectors Track 63 63 63 Number of Cylinders 16 38...

Page 17: ...3 8 131 5 152 7 98 5 203 8 131 5 Number of zones 24 24 24 24 24 Table 2 Data sheet 4 3 Cylinder allocation Data format is allocated by each head characteristics Typical format is described below 80GB p format Zone Cylinder No of Sectors Trk 0 0 6067 1116 1 6068 9101 1104 2 9102 13245 1080 3 13246 17389 1056 4 17390 21163 1032 5 21164 26713 1008 6 26714 29747 984 7 29748 33891 960 8 33892 38035 936...

Page 18: ...of the drive This specification does not include the system throughput as this is dependent upon the system and the application The following table gives a typical value for each parameter The detailed descriptions are found in section 5 0 Function Average Random Seek Time Read ms 11 Average Random Seek Time Write ms 13 Rotational Speed RPM 5400 Power on to ready sec 3 5 Command overhead ms 1 0 Di...

Page 19: ...on recovery is not employed to correct arrival problems The Average Seek Time is measured as the weighted average of all possible seek combinations max Σ max 1 n Tnin Tnout n 1 Weighted Average max 1 max Where max maximum seek length n seek length 1 to max Tnin inward measured seek time for an n track seek Tnout outward measured seek time for an n track seek 4 4 2 2 Full stroke seek Command Type T...

Page 20: ...me Condition Typical sec Max sec Power On To Ready 3 5 9 5 Table 9 Drive ready time Ready The condition in which the drive is able to perform a media access command for example read write immediately Power On To Ready This includes the time required for the internal self diagnostics ...

Page 21: ...f accepting commands The spindle motor is stopped All circuitry but the host interface is in power saving mode The execution of commands is delayed until the spindle becomes ready Sleep The device requires a soft reset or a hard reset to be activated All electronics including spindle motor and host interface are shut off Table 10 Operating mode 4 4 3 1 Mode transition time From To Transition Time ...

Page 22: ...mmand Standby command Standby Immediate command Sleep command Confirm the command s completion 5 3 Equipment status The equipment status is available to the host system any time the drive is not ready to read write or seek This status normally exists at the power on time and will be maintained until the following conditions are satisfied The access recalibration tuning is complete The spindle spee...

Page 23: ... When a write operation cannot be completed after the Error Recovery Procedure ERP is fully carried out the sectors are reallocated to the spare location An error is reported to the host system only when the write cache is disabled and the auto reallocation has failed 5 7 2 Nonrecoverable read error When a read operation fails after ERP is fully carried out a hard error is reported to the host sys...

Page 24: ...on capability The first 6 symbol of ECC are 4 check symbols for user data and the 2 symbol system ECC The other 34 symbols are Read Solomon ECC Hardware logic corrects up to 16 symbols 20 bytes errors on the fly 2 symbol System ECC is generated when HDC receives user data from HOST and can correct up to 1 symbol 10bit errors on the fly when one transfers to HOST ...

Page 25: ...tion The system is responsible for providing sufficient air movement to maintain surface temperatures below 60 C at the center of top cover and below 63 C at the center of the drive circuit board assembly The maximum storage period in the shipping package is one year Specification Environment 0 10 20 30 40 50 60 70 80 90 100 45 35 25 15 5 5 15 25 35 45 55 65 Temperature degC Relative Humidity Oper...

Page 26: ...nsity limits 6 1 4 Conductive noise The disk drive shall work without soft error degradation in the frequency range from DC to 20 Mhz injected through any two of the mounting screw holes of the drive when an AC current of up to 45 mA p p is applied through a 50 ohm resistor connected to any two mounting screw holes 6 1 5 Magnetic fields The disk drive will withstand radiation and conductive noise ...

Page 27: ...age 1 8 Seek average 5 2 2 Standby 0 25 Sleep 0 2 Startup maximum peak 6 5 0 Average from power on to ready 3 8 Table 14 DC Power requirements Footnotes 1 The maximum fixed disk ripple is measured at the 5 volt input of the drive 2 The disk drive shall not incur damage for an over voltage condition of 25 maximum duration of 20 ms on the 5 volt nominal supply 3 The idle current is specified at an i...

Page 28: ...consumption efficiency Capacity 160GB 120GB 80GB 60GB 40GB Power Consumption Efficiency Watts GB 0 0041 0 0054 0 0081 0 0108 0 0163 Table 15 Power consumption efficiency Note Power consumption efficiency is calculated as Power Consumption of Low Power Idle Watt Capacity GB ...

Page 29: ... the power requirement section 6 3 4 Service life and usage condition The drive is designed to be used under the following conditions The drive should be operated within specifications of shock vibration temperature humidity altitude and magnetic field The drive should be protected from ESD The breathing hole in the top cover of the drive should not be covered Force should not be applied to the co...

Page 30: ...mergency unload is intended to be invoked in rare situations Because this operation is inherently uncontrolled it is more mechanically stressful than a normal unload The drive supports a minimum of 20 000 emergency unloads 6 3 6 2 Required Power Off Sequence The required host system sequence for removing power from the drive is as follows Step 1 Issue one of the following commands Standby Standby ...

Page 31: ...ead disk durability The heads do not land on the disk so this type of test should be viewed as a test of the load unload function Start Stop testing should be done by commands through the interface not by power cycling the drive Simple power cycling of the drive invokes the emergency unload mechanism and subjects the HDD to nontypical mechanical stress Power cycling testing may be required to test...

Page 32: ...imensions for the drive Model Height mm Width mm Length mm Weight gram 160 GB 120 GB models 9 5 0 2 69 85 0 25 100 2 0 25 102 Max 80 GB 60 GB 40 GB models 9 5 0 2 69 85 0 25 100 2 0 25 95 Max Table 16 Physical dimensions and weight 6 4 2 Mounting hole locations The mounting hole locations and size of the drive are shown below Figure 2 Mounting hole locations ...

Page 33: ...nd vice versa The recommended mounting screw torque is 0 3 0 05 Nm The recommended mounting screw depth is 3 0 0 3 mm for bottom and 3 5 0 5 mm for horizontal mounting The user is responsible for using the appropriate screws or equivalent mounting hardware to mount the drive securely enough to prevent excessive motion or vibration of the drive at seek operation or spindle rotation 6 4 4 Load unloa...

Page 34: ...e being subjected to the following vibration levels 6 5 1 1 Random vibration The test consists of 30 minutes of random vibration using the power spectral density PSD levels below The vibration test level is 6 57 m sec2 RMS Root Mean Square 0 67 G RMS Random vibration PSD profile Breakpoint Hz m x 10n m2 sec4 Hz 5 1 9 x E 3 17 1 1 x E 1 45 1 1 x E 1 48 7 7 x E 1 62 7 7 x E 1 65 9 6 x E 1 150 9 6 x ...

Page 35: ... disk drive meets the criteria in the table below while operating under these conditions The shock test consists of 10 shock inputs in each axis and direction for a total of 60 There must be a minimum delay of 3 seconds between shock pulses The disk drive will operate without a hard error while subjected to the following half sine shock pulse Duration of 1 ms Duration of 2 ms 1568 m sec2 160 G 318...

Page 36: ...om the chamber floor No sound absorbing material shall be used The acoustical characteristics of the disk drive are measured under the following conditions Mode definitions Idle mode Power on disks spinning track following unit ready to receive and respond to control line commands Operating mode Continuous random cylinder selection and seek operation of the actuator with a dwell time at each cylin...

Page 37: ...mmission FCC Rules and Regulations Class B Part 15 RFI Suppression German National Requirements RFI Japan VCCI Requirements of HITACHI products EU EMC Directive Technical Requirements and Conformity Assessment Procedures 6 8 1 CE Mark The product is certified for compliance with EC directive 89 336 EEC The EC marking for the certification appears on the drive 6 8 2 C Tick Mark The product complies...

Page 38: ... material with a UL recognized flammability rating of V 1 or better except minor mechanical parts 6 9 5 Secondary circuit protection This product utilizes printed circuit wiring that must be protected against the possibility of sustained combustion due to circuit or component failures as defined in C B 2 4700 034 Protection Against Combustion Adequate secondary over current protection is the respo...

Page 39: ...case of back plane blind mate connector only In this case the mating sequences are 1 the ground pins P4 and P12 2 the pre charge power pins and the other ground pins and 3 the signal pins and the rest of the power pins There are three power pins for each voltage One pin from each voltage is used for pre charge in the backplane blind mate situation If a device uses 3 3V then all V33 pins must be te...

Page 40: ...mate Gnd P13 V12 12V power pre chage 2nd mate V12 P14 V12 12V power V12 P15 V12 12V power V12 Table 23 Interface connector pins and I O signals Note 1 Pin P11 is used by the drive to provide the host with an activity indication and by the host to indicate whether staggered spinup should be used The signal the drive provides for activity indication is a low voltage low current driver If pin P11 is ...

Page 41: ... Out of band signaling Figure 4 shows the timing of COMRESET COMINIT and COMWAKE COMRESET COMINIT t1 t2 t3 t4 COMWAKE PARAMETER DESCRIPTION Nominal ns T1 ALINE primitives 106 7 T2 Spacing 320 T3 ALIGN primitives 106 7 T4 Psacing 106 7 Figure 4 Parameter descriptions ...

Page 42: ...Travelstar 5K160 SATA Hard Disk Drive Specification 42 167 Part 2 Interface Specification ...

Page 43: ...l ATA High Speed Serialized AT Attachment Revision 1 0a dated on 7 January 2003 Serial ATA II Extensions to Serial ATA 1 0a Revision 1 2 dated on 27 August 2004 AT Attachment with Packet Interface Extension ATA ATAPI 7 Revision 4b dated on 21 April 2004 HTS5416XXJ9SA00 support following functions as Vendor Specific Function Format Unit Function SENSE CONDITION command 8 2 Terminology Device Device...

Page 44: ...isters used for delivering commands to the device or posting status from the device About details please refer to the Serial ATA Specification In the following cases the host adapter sets the BSY bit in its shadow Status Register and transmits a FIS to the device containing the new contents Command register is written in the Shadow Register Block Device Control register is written in the Shadow Re...

Page 45: ...ce Control Register Bit Definitions SRST RST Software Reset The device is held reset when RST 1 Setting RST 0 reenables the device The host must set RST 1 and wait for at least 5 microseconds before setting RST 0 to ensure that the device recognizes the reset IEN Interrupt Enable When IEN 0 and the device is selected device interrupts to the host will be enabled When IEN 1 or the device is not sel...

Page 46: ...k 0 was not found during a Recalibrate command AMNF AMN Address Mark Not Found AMN 1 indicates the data address mark has not been found after finding the correct ID field for the requested sector This bit is obsolete 11 6 Features Register This register is command specific This is used with the Set Features command S M A R T Function Set command and Format Unit command 11 7 LBA High Register This ...

Page 47: ...never the device is accessing the registers The host should not read or write any registers when BSY 1 If the host reads any register when BSY 1 the contents of the Status Register will be returned DRDY RDY Device Ready RDY 1 indicates that the device is capable of responding to a command RDY will be set to 0 during power on until the device is ready to accept a command DF Device Fault DF 1 indica...

Page 48: ...r 5 x x Initialization of registers 2 O o o Reverting programmed parameters to default O 6 3 Number of CHS set by Initialize Device Parameter Multiple mode Write cache Read look ahead ECC bytes Volatile max address Power mode 5 4 4 Reset Standby timer value o o x O execute X not execute Note 1 Execute after the data in write cache has been written 2 Default value on POR is shown in Default Registe...

Page 49: ... as follows Execute Device Diagnostic In all the above cases Power on COMRESET Soft reset and the EXECUTE DEVICE DIAGNOSTIC command the Error register is shown in the following table Device 0 Passed Error Register Yes 01h No 0xh Where x indicates the appropriate Diagnostic Code for the Power on COMRESET Soft reset or Device Diagnostic error Figure 8 Reset error register values 12 3 Power off consi...

Page 50: ... typical case 3 Terminate power to HDD This power down sequence should be followed for entry into any system power down state or system suspend state or system hibernation state In a robustly designed system emergency unload is limited to rare scenarios such as battery removal during operation 12 4 Sector Addressing Mode All addressing of data sectors recorded on the device s media is by a logical...

Page 51: ...t of functions 1 A Standby timer 2 Idle command 3 Idle Immediate command 4 Sleep command 5 Standby command 6 Standby Immediate command 12 5 1 Power Mode Sleep Mode The lowest power consumption when the device is powered on occurs in Sleep Mode When in sleep mode the device requires a reset to be activated Standby Mode The device interface is capable of accepting commands but as the media may not i...

Page 52: ...nitial Power Mode at Power On After power on the device goes to IDLE mode or STANDBY mode depending on the option Refer HTS5416XXJ9SA00 Final Functional Specification P N TBD for the initial power mode selection 12 6 Advanced Power Management Adaptive Battery Life Extender 3 Feature This feature provides power saving without performance degradation The Adaptive Battery Life Extender 3 ABLE 3 techn...

Page 53: ... Idle mode The heads are unloaded on the ramp however the spindle is still rotated at the full speed Recovery time to Active mode is about 300ms 12 6 4 Transition Time The transition time is dynamically managed by users recent access pattern instead of fixed times The ABLE 3 algorithm monitors the interval between commands instead of the command frequency of ABLE 2 The algorithm supposes that next...

Page 54: ...s for that particular device The specific set of attributes being used and the identity of these attributes is vendor specific and proprietary 12 8 2 Attribute values Attribute values are used to represent the relative reliability of individual performance or calibration attributes Higher attribute values indicate that the analysis algorithms being used by the device are predicting a lower probabi...

Page 55: ...bled by either a security unlock command or a security erase unit command Device Unlocked mode The device enables all commands If a password is not set this mode is entered after power on otherwise it is entered by a security unlock or a security erase unit command Device Frozen mode The device enables all commands except those which can update the device lock function set change password The devi...

Page 56: ...n the Identify Device command word 92 The valid revision codes are 0001h to FFFEh The default value of Master Password Revision Code is FFFEh Value 0000h and FFFFh is reserved 12 9 5 Operation example 12 9 5 1 Master Password setting The system manufacturer dealer can set a initial Master Password using the Security Set Password command without enabling the Device Lock Function 12 9 5 2 User Passw...

Page 57: ...9 1 3 User Password Lost If the User Password is forgotten and High level security is set the system user can t access any data However the device can be unlocked using the Master Password If a system user forgets the User Password and Maximum security level is set data access is impossible However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all ...

Page 58: ...hen SECURITY ERASE UNIT command and SECURITY UNLOCK command are aborted until a power off The count and EXPIRE bit are cleared after a power on reset 12 9 6 Command Table This table shows the device s response to commands when the Security Mode Feature Set Device lock function is enabled Command Device Locked Mode Device Unlock Mode Device Frozen Mode Check Power Mode o o o Device Configuration RE...

Page 59: ...s Ext o o o Read Sector s x o o Read Sector s Ext x o o Read Verify Sector s x o o Read Verify Sector s Ext x o o Recalibrate o o o Security Disable Password x o x Security Erase Prepare o o o Security Erase Unit o o x Security Freeze Lock x o o Security Set Password x o x Security Unlock o o x Seek o o o Sense Condition o o o Set Features o o o Figure 14 Command table for device lock operation ...

Page 60: ...andby Immediate o o o Write Buffer o o o Write DMA x o o Write DMA Ext x o o Write DMA FUA Ext x o o Write FPDMA Queued x o o Write Long x o o Write Multiple x o o Write Multiple Ext x o o Write Multiple FUA Ext x o o Write Sector s x o o Write Sector s Ext x o o Figure 15 Command table for device lock operation continued 12 10 Protected Area Function Protected Area Function is to provide the prot...

Page 61: ...e device be accessible including the protected area by setting device Max LBA as 0FFFFFh via Set Max Address command The option could be either nonvolatile or volatile Test the sectors for protected area LBA 0FC000h if required Write information data such as BIOS code within the protected area Change maximum LBA using Set Max Address command to 0FBFFFh with nonvolatile option From this point the p...

Page 62: ...e device from the Set Max Locked mode to the Set Max Unlocked mode This command requests a transfer of a single sector of data from the host The figure 16 shown above defines the content of this sector of information The password supplied in the sector of data transferred is compared with the stored Set Max password If the password compare fails then the device returns command aborted and decremen...

Page 63: ...ncement whereby the device reports completion of the write command Write Sector s and Write Multiple to the host as soon as the device has received all of the data into its buffer The device assumes responsibility to write the data subsequently onto the disk While writing data after completed acknowledgment of a write command soft reset or COMRESET does not affect its operation But power off termi...

Page 64: ...ctor failed once then recovered at the specific ERP step this sector of data is reallocated automatically A media verification sequence may be run prior to the relocation according to the pre defined conditions 12 14 48 bit Address Feature Set The 48 bit Address feature set allows devices with capacities up to 281 474 976 710 655 sectors This allows device capacity up to 144 115 188 075 855 360 by...

Page 65: ...y be enabled or disabled using Set Features with a subcommand code of 06h Software settings preservation is enabled by default 12 15 1 Preserved software settings If Software setting preservation is enabled the following settings are preserved across COMRESET Otherwise settings are cleared across COMRESET Setting Contents Track length Number of head Number of cylinder Initialize device parameters ...

Page 66: ...s on Page 5 shows the device timeout values 13 1 Data In Commands These commands are Device Configuration Identify Identify Device Read Buffer Read Long Read Multiple Read Multiple Ext Read Sector s Read Sector s Ext S M A R T Read Attribute Values S M A R T Read Attribute Thresholds S M A R T Read log sector Execution includes the transfer of one or more 512 byte 512 bytes on Read Long sectors of...

Page 67: ...re the error status in the Error Register The registers will contain the location of the sector in error The errored location will be reported with CHS mode or LBA mode The mode is decided by mode select bit bit 6 of Device register on issuing the command All data transfers to the device through the Data Register are 16 bits except for the ECC bytes which are 8 bits 13 3 Non Data Commands These co...

Page 68: ...ansfer commands is identical to the Read Sector or Write Sector commands except that the host initializes the slave DMA channel prior to issuing the command The DMA protocol allows high performance multi tasking operating systems to eliminate processor overhead associated with PIO transfers Refer HTS5416XXJ9SA00 Final Functional Specification for further details 13 5 First parity DMA Commands Thes...

Page 69: ... 0 4 Read DMA C8 1 1 0 0 1 0 0 0 4 Read DMA C9 1 1 0 0 1 0 0 1 4 Read DMA Ext 25 0 0 1 0 0 1 0 1 5 Read FPDMA Queued 60 0 1 1 0 0 0 0 0 1 Read Log Ext 2F 0 0 1 0 1 1 1 1 1 Read Long 22 0 0 1 0 0 0 1 0 1 Read Long 23 0 0 1 0 0 0 1 1 1 Read Multiple C4 1 1 0 0 0 1 0 0 1 Read Multiple Ext 29 0 0 1 0 1 0 0 1 3 Read Native Max Address F8 1 1 1 1 1 0 0 0 3 Read Native Max Address Ext 27 0 0 1 0 0 1 1 1 ...

Page 70: ...0 3 S M A R T Return Status B0 1 0 1 1 0 0 0 0 3 S M A R T Save Attribute Values B0 1 0 1 1 0 0 0 0 2 S M A R T Write Log Sector B0 1 0 1 1 0 0 0 0 3 Standby E2 1 1 1 0 0 0 1 0 3 Standby 96 1 0 0 1 0 1 1 0 3 Standby Immediate E0 1 1 1 0 0 0 0 0 3 Standby Immediate 94 1 0 0 1 0 1 0 0 2 Write Buffer E8 1 1 1 0 1 0 0 0 4 Write DMA CA 1 1 0 0 1 0 1 0 4 Write DMA CB 1 1 0 0 1 0 1 1 4 Write DMA Ext 35 0...

Page 71: ...ly on Read Write Long EF 44 Disable read look ahead feature EF 55 Disable reverting to power on defaults EF 66 Disable write cache EF 82 Disable Advanced Power Management feature EF 85 Disable Power Up in Standby feature EF 86 Disable use of Serial ATA feature EF 90 Enable read look ahead feature EF AA 4 bytes of ECC apply on Read Write Long EF BB Disable AAM EF C2 Enable reverting to power on def...

Page 72: ...bit is part of an output parameter and should be specified x Indicates that the hex character is not used Indicates that the bit is not used Input Registers 0 Indicates that the bit is always set to 0 1 Indicates that the bit is always set to 1 H Head number Indicates that the head number part of the Device Register is an input parameter and will be set by the device V Valid Indicates that the bit...

Page 73: ...ee Below Error Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 0 0 0 0 V Figure 23 Check Power Mode Command E5h 98h The Check Power Mode command will report whether the device is spun up and the media is available for immediate access Input Parameters From The Device Sector Count The power mode code The command ...

Page 74: ...EZE LOCK C2h DEVICE CONFIGURATION IDENTIFY C3h DEVICE CONFIGURATION SET other Reserved Figure 25 Device Configuration Overlay Features register values 14 2 1 DEVICE CONFIGURATION RESTORE subcommand C0h The DEVICE CONFIGURATION RESTORE command discard any setting previously made by a DEVICE CONFIGURATION SET command and return the content of the IDENTIFY DEVICE command response to the original sett...

Page 75: ... IDENTIFY command no action is taken for that bit The format of the overlay transmitted by the device is described in the table at next page The restrictions on changing these bits are described in the text following that table If any of the bit modification restrictions described are violated or any setting is changed with DEVICE CONFIGURATION SET command the device shall return command aborted A...

Page 76: ...pported 0 1 Native command queuing supported 11 254 Reserved 255 Integrity word Note 15 8 Checksum 7 0 Signature A5h Figure 26 Device Configuration Overlay Data structure Note Bits 7 0 of this word contain the value A5h Bits 15 8 of this word contain the data structure checksum The data structure checksum is the two s complement of the sum of all byte in words 0 through 254 and the byte consisting...

Page 77: ... 0 0 Status See Below Error Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 V V V V V V V 0 0 0 0 0 0 Figure 28 Execute Device Diagnostic Command 90h The Execute Device Diagnostic command performs the internal diagnostic tests implemented by the device The results of the test are stored in the Error Register The normal Error Re...

Page 78: ...High LBA High Device Device Command 1 1 1 0 0 1 1 1 Status See Below Error Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 V 0 0 V Figure 29 Flush Cache Command E7h This command causes the device to complete writing data from its cache The device returns a status RDY 1 and DSC 1 50h after following sequence ...

Page 79: ...ent HOB 0 LBA Low Previous LBA Low HOB 1 Current HOB 0 LBA Mid Previous LBA Mid HOB 1 Current HOB 0 LBA High Previous LBA High HOB 1 Device Device Command 1 1 1 0 1 0 1 0 Status See Below Error Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AMN BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 V 0 0 V Figure 30 Flush Cache EXT Command EAh This command causes th...

Page 80: ...e track will be initialized to zero with write operation At this time whether the sector of data is initialized correctly is not verified with read operation Any data previously stored on the track will be lost Output Parameters To The Device LBA Low In LBA mode this register specifies LBA address bits 0 7 to be formatted L 1 LBA High Mid The cylinder number of the track to be formatted L 0 In LBA...

Page 81: ...right after this command completion and are also used on next power on reset Both previous information are erased from the device by this command Note that the Format Unit command initializes from LBA 0 to Native MAX LBA Host MAX LBA set by Initialize Drive Parameter or Set MAX ADDRESS command is ignored So the protected area by Set MAX ADDRESS commands is also initialized The security erase prepa...

Page 82: ... 045xH Drive classification bit assignments 15 0 1 ATAPI device 0 ATA device 14 0 1 format speed tolerance gap required 13 0 1 track offset option available 12 0 1 data strobe offset option available 11 0 1 rotational speed tolerance 0 5 10 1 1 disk transfer rate 10 Mbps 9 0 1 disk transfer rate 5 Mbps but 10 Mbps 8 0 1 disk transfer rate 5 Mbps 7 0 1 removable cartridge device 6 1 1 fixed device ...

Page 83: ...O 0000 cannot perform 49 0F00H Capabilities bit assignments 15 14 0 Reserved 13 0 0 Standby timer value are vendor specific 12 0 Reserved 11 1 1 IORDY Supported 10 1 1 IORDY can be disabled 9 1 1 LBA Supported 8 1 1 DMA Supported 7 0 0 Reserved 50 4000H Capabilities 15 0 0 the contents of word 50 are valid 14 1 1 the contents of word 50 are valid 13 2 0 Reserved 1 0 Obsolete 0 0 1 the device has a...

Page 84: ... 48 bit native max address is greater than 268 435 455 62 0000H Reserved Note 1 The mark in Content field indicates the use of those parameters that are vendor specific Note 2 See following table Number of cylinders heads sectors by models for Number of cylinders heads sectors by models for HTS5416XXJ9SA00 on Page 5 ...

Page 85: ... 6MB s 67 0078H Minimum PIO Transfer Cycle Time Without Flow Control 15 0 78h Cycle time in nanoseconds 120ns 16 6MB s 68 0078H Minimum PIO Transfer Cycle Time With IORDY Flow Control 15 0 78h Cycle time in nanoseconds 120ns 16 6MB s 69 74 0000H Reserved 75 001FH Queue depth 15 5 0 Reserved 4 0 1Fh Maximum queued depth 1 76 0x02H SATA capabilities 15 11 0 Reserved 10 0 Phy event counters 9 1 Recei...

Page 86: ... Feature Set 1 1 1 supports Security Feature Set 0 1 1 supports S M A R T Feature Set Note 1 The mark in Content field indicates the use of those parameters that are vendor specific Note 2 The feature marked is able to be unsupported by the Device Configuration Overlay command Figure 36 Identify device information Continued 83 7F69H Command set supported 15 0 Always 14 1 Always 13 1 1 FLUSH CACHE ...

Page 87: ...errupt enabled 7 0 1 release interrupt enabled 6 x 1 look ahead enabled 5 x 1 write cache enabled 4 0 1 supports PACKET Command Feature Set 3 1 1 supports Power Management Feature Set 2 0 1 supports Removable Media Feature Set 1 x 1 Security Feature Set enabled 0 x 1 S M A R T Feature Set enabled Note 1 The mark in Content field indicates the use of those parameters that are vendor specific Note 2...

Page 88: ... Ultra DMA Transfer mode mode 5 supported 15 0 Reserved 14 0 1 UltraDMA mode 6 is selected 13 x 1 UltraDMA mode 5 is selected 12 x 1 UltraDMA mode 4 is selected 11 x 1 UltraDMA mode 3 is selected 10 x 1 UltraDMA mode 2 is selected 9 x 1 UltraDMA mode 1 is selected 8 x 1 UltraDMA mode 0 is selected 7 0 Reserved 6 0 1 UltraDMA mode 6 is supported 5 1 1 UltraDMA mode 5 is supported 4 1 1 UltraDMA mod...

Page 89: ...Address feature set 104 0000H Streaming Transfer Time PIO 105 106 0000H Reserved 107 8848H Inter seek delay time 1 5tt 2 5tl 108 111 XXXX World Wide Name 112 118 0000H Reserved 119 4000H Supported Setting 15 0 Always 14 1 Always 13 3 0 Reserved 2 0 1 WRITE UNCORRECTABLE is supported 1 0 1 Write Read Verify feature set is supported 0 0 Reserved 120 4000H Enabled Setting 15 0 Always 14 1 Always 13 3...

Page 90: ... Page 5 Figure 40 Identify device information Model Number in ASCII Hitachi HTS541616J9SA00 Hitachi HTS541612J9SA00 Number of cylinders 3FFFh 3FFFh Number of heads 10h 10h Buffer size 3AB8h 3AB8h Total number of user addressable sectors word 60 61 FFFFFFFh DF94BB0h Maximum user LBA address for 48 bit Address feature set word 100 103 12A19EB0h DF94BB0h Model Number in ASCII Hitachi HTS541680J9SA00 ...

Page 91: ...le mode immediately and set auto power down timeout parameter standby timer And then the timer starts counting down When the device s power save mode is already any idle mode the device keep that mode When the Idle mode is entered the device is spun up to operating speed If the device is already spinning the spin up sequence is not executed During Idle mode the device is spinning and ready to resp...

Page 92: ... Below Error Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 V 0 0 V Figure 43 Idle Immediate Command E1h 95h The Idle Immediate command causes the device to enter performance Idle mode The device is spun up to operating speed If the device is already spinning the spin up sequence is not executed During Idle...

Page 93: ...0 0 0 V 0 0 0 0 0 0 0 V Figure 44 Initialize Device Parameters Command 91h The Initialize Device Parameters command enables the host to set the number of sectors per track and the number of heads minus 1 per cylinder Words 54 58 in Identify Device Information reflects these parameters The parameters remain in effect until the following events Another Initialize Device Parameters command is receive...

Page 94: ...ter Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 0 0 V Figure 45 Read Buffer Command E4h The Read Buffer command transfers a sector of data from the sector buffer of device to the host The sector is transferred through the Data Register 16 bits at a time The sector transferred will be from the same part of the buf...

Page 95: ...data transfer has terminated and status is available If an uncorrectable error occurs the read will be terminated at the failing sector Output Parameters To The Device Sector Count The number of continuous sectors to be transferred If zero is specified then 256 sectors will be transferred LBA Low The sector number of the first sector to be transferred L 0 In LBA mode this register specifies LBA ad...

Page 96: ...e Data Register 16 bits at a time The host initializes a slave DMA channel prior to issuing the command The data transfers are qualified by DMARQ and are performed by the slave DMA channel The device issues only one interrupt per command to indicate that data transfer has terminated and status is available If an uncorrectable error occurs the read will be terminated at the failing sector Output Pa...

Page 97: ...terminated at the failing sector Output Parameters To The Device Feature Current The number of sectors to be transferred low order bits 7 0 Feature Previous The number of sectors to be transferred high order bits 15 8 T TAG value It shall be assigned to be different from all other queued commands The value shall not exceed the maximum queue depth specified by the Word 75 of the Identify Device inf...

Page 98: ...ice R Phy Event Counter Reset bit When Log address is 11h Phy Event Counter and this bit is set to 1 all Phy Event Counter values are reset to 0 after sending the current counter valules Sector Count Current The number of sectors to be read from the specified log low order bits 7 0 The log transferred by the drive shall start at the sector in the specified log at the specified offset regardless of...

Page 99: ... 1 100h Number of sectors in the log at log address 80h 15 8 1 101h Number of sectors in the log at log address FFh 7 0 1 1FEh Number of sectors in the log at log address FFh 15 8 1 1FFh 512 Figure 51 General purpose Log Directory The value of the General Purpose Logging Version word shall be 0001h A value of 0000h indicates that there is no General Purpose Log Directory The logs at log addresses ...

Page 100: ...and data structure 18 00h 2nd command data structure 18 12h 3rd command data structure 18 24h 4th command data structure 18 36h 5th command data structure 18 48h Error data structure 34 5Ah 124 Figure 53 Extended Error log data structure Command data structure Data format of each command data structure is shown below Description Bytes Offset Device Control register 1 00h Features register 7 0 see ...

Page 101: ...f line or Self test x5h xAh Reserved xBh xFh Vendor specific Note The value of x is vendor specific 14 16 2 4 Device error count This field shall contain the total number of errors attributable to the device that have been reported by the device during the life of the device This count shall not include errors attributed to the receipt of faulty commands such as commands codes not implemented by t...

Page 102: ...be 01h 14 16 3 2 Self test descriptor index This indicates the most recent self test descriptor If there have been no self tests this is set to zero Valid values for the Self test descriptor index are 0 to 18 14 16 3 3 Extended Self test log descriptor entry The content of the self test descriptor entry is shown below Description Bytes Offset Self test number 1 00h Self test execution status 1 01h...

Page 103: ...formation about Phy level events that occur on the interface The counter values are not retained across power cycles The counter values are preserved across COMRESET and software resets 14 16 5 1 Counter Reset Mechanisms There are 2 mechanisms by which the host can explicitly cause the Phy counters to be reset The first mechanism is to issue a BIST Activate FIS to the drive The second mechanism us...

Page 104: ...he format of the Phy Event counter data structure Byte 7 6 5 4 3 2 1 0 0 00h 1 00h 2 00h 3 00h 4 5 Counter 0001h Identifier 6 7 Counter 0001h Value 8 9 Counter 0009h Identifier 10 11 Counter 0009 Value 12 13 Counter 000Ah Identifier 14 15 Counter 000Ah Value 16 17 Counter 000Bh Identifier 18 19 Counter 000Bh Value 20 21 Counter 000Dh Identifier 22 23 Counter 000Dh Value 24 00h 25 00h 26 510 Reserv...

Page 105: ...ta and does not check the data using ECC Whatever is read is returned to the host Output Parameters To The Device Sector Count The number of continuous sectors to be transferred The Sector Count must be set to one LBA Low The sector number of the sector to be transferred L 0 In LBA mode this register contains LBA bits 0 7 L 1 LBA High Mid The cylinder number of the sector to be transferred L 0 In ...

Page 106: ...t an interrupt is generated for each block as defined by the Set Multiple command instead of for each sector Output Parameters To The Device Sector Count The number of continuous sectors to be transferred If zero is specified then 256 sectors will be transferred LBA Low The sector number of the first sector to be transferred L 0 In LBA mode this register contains LBA bits 0 7 L 1 LBA High Mid The ...

Page 107: ...IDN 0 ABT T0N AMN BSY RDY DF DSC DRQ COR IDX ERR 0 V 0 V 0 V 0 0 0 V 0 V 0 0 V Figure 63 Read Multiple Ext Command 29h Output Parameters To The Device Sector Count Current The number of sectors to be transferred low order bits 7 0 Sector Count Previous The number of sectors to be transferred high order bits 15 8 If 0000h in the Sector Count register is specified then 65 536 sectors will be transfe...

Page 108: ...5 the Read Native Max Address command return a value of 268 435 455 Output Parameters To The Device L LBA mode Indicates the addressing mode L 0 specifies CHS mode and L 1 does LBA addressing mode D The device number bit Indicates that the device number bit of the Device Register should be specified D 0 selects the master device and D 1 selects the slave device Indicates that the bit is not used I...

Page 109: ...1 Device Command 0 0 1 0 0 1 1 1 Status See Below Error Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AMN BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 0 0 V Figure 595 Read Native Max Address Ext Command 29h This command returns the native max LBA of HDD which is not effected by Set Max Address Ext command Input Parameters From The Device LBA Low HOB 0 LB...

Page 110: ...ead will be terminated at the failing sector Output Parameters To The Device Sector Count The number of continuous sectors to be transferred If zero is specified then 256 sectors will be transferred LBA Low The sector number of the first sector to be transferred L 0 In LBA mode this register contains LBA bits 0 7 L 1 LBA High Mid The cylinder number of the first sector to be transferred L 0 In LBA...

Page 111: ...nd reads from 1 to 65 536 sectors of data from disk media then transfers the data from the device to the host The sectors are transferred through the Data Register 16 bits at a time If an uncorrectable error occurs the read will be terminated at the failing sector Output Parameters To The Device Sector Count Current The number of sectors to be transferred low order bits 7 0 Sector Count Previous T...

Page 112: ...ble error occurs the read verify will be terminated at the failing sector Output Parameters To The Device Sector Count The number of continuous sectors to be verified If zero is specified then 256 sectors will be verified LBA Low The sector number of the first sector to be transferred L 0 In LBA mode this register contains LBA bits 0 7 L 1 LBA High Mid The cylinder number of the first sector to be...

Page 113: ...tors on the device No data is transferred to the host The difference between the Read Sector s Ext command and the Read Verify Sector s Ext command is whether the data is transferred to the host or not If an uncorrectable error occurs the Read Verify Sector s Ext will be terminated at the failing sector Output Parameters To The Device Sector Count Current The number of sectors to be transferred lo...

Page 114: ... LBA Low LBA Mid LBA Mid LBA High LBA High Device Device Command 0 0 0 1 Status See Below Error Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V V 0 0 V 0 V 0 0 V Figure 62 Recalibrate Command 1xh The Recalibrate command moves the read write heads from anywhere on the disk to cylinder 0 If the device cannot reach cylin...

Page 115: ...t including information specified in Password Information for Security Disable Password command on Page 5 Then the device checks the transferred password If the User Password or Master Password matches the given password the device disables the security mode feature device lock function This command does not change the Master Password which may be re activated later by setting User Password This c...

Page 116: ...Status See Below Error Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 V 0 0 V Figure 65 Security Erase Prepare Command F3h The Security Erase Prepare Command must be issued immediately before the Security Erase Unit Command to enable device erasing and unlocking The Security Erase Prepare Command must be is...

Page 117: ...jects the command with an Aborted error Word Description 00 Control word bit 0 Identifier 1 Mater 0 User bit 1 15 Reserved 01 16 Password 32 bytes 17 255 Reserved Figure 67 Erase Unit Information Identifier Zero indicates that the device should check the supplied password against the user password stored internally One indicates that the device should check the given password against the master pa...

Page 118: ... function the password sent by the host is NOT compared with the password stored in the device for both the Master Password and the User Password and then the device only erases all user data The execution time of this command is shown below HTS541616J9SA00 82 min HTS541612J9SA00 72 min HTS541680J9SA00 42 min HTS541660J9SA00 38 min HTS541640J9SA00 22 min ...

Page 119: ...1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 0 0 V Figure 68 Security Freeze Lock Command F5h The Security Freeze Lock Command allows the device to enter frozen mode immediately After this command is completed the command which updates Security Mode Feature Device Lock Function is rejected Frozen mode is quit only by Power off The following ...

Page 120: ...locked immediately The device is locked after next COMRESET with Software Setting Preservation disabled or power on reset When the MASTER password is set by this command the master password is registered internally but the device is NOT locked after next power on reset This command requests a transfer of a single sector of data from the host including the information specified in Security Set Pass...

Page 121: ...ing of the Identifier and Security level bits interact as follows Identifier User Security level High The password supplied with the command will be saved as the new user password The security mode feature lock function will be enabled from the next power on The file may then be unlocked by either the user password or the previously set master password Identifier Master Security level High This co...

Page 122: ... to master and the file is in high security mode then the password supplied will be compared with the stored master password If the file is in maximum security mode then the security unlock will be rejected If the Identifier bit is set to user then the file compares the supplied password with the stored user password If the password compare fails then the device returns an abort error to the host ...

Page 123: ... 0 0 V 0 V 0 0 V Figure 73 Seek Command 7xh The Seek command initiates a seek to the designated track and selects the designated head The device need not be formatted for a seek to execute properly Output Parameters To The Device LBA Low In LBA mode this register specifies LBA address bits 0 7 for seek L 1 LBA High Mid The cylinder number of the seek In LBA mode this register specifies LBA address...

Page 124: ...ense Condition command is used to sense temperature in a device This command is executable without spinning up even if a device is started with No Spin Up option If this command is issued at the temperature out of range which is specified for operating condition the error might be returned with IDN bit 1 Output Parameters To The Device Feature The Feature register must be set to 01h All other valu...

Page 125: ...efault Write cache Enable ECC bytes 4 bytes Read look ahead Enable Reverting to power on defaults Disable Device initiated interface power state transition Disable Software setting preservation Enable Output Parameters To The Device Feature Destination code for this command 02H Enable write cache Note 2 03H Set transfer mode based on value in sector count register 05H Enable Advanced Power Managem...

Page 126: ...ment capacity the write cache function will be automatically disabled Although the device still accepts the Set Features command with Feature register 02h without error the write cache function will remain disabled For current write cache function status please refer to the Identify Device Information 129word by Identify Device command Power off must not be done in 5 seconds after write command co...

Page 127: ...completed immediately prior to issuing Set Max Address command Otherwise this command is interpreted as a Set Max security extension command which is destinated by feature register If Set Max security mode is in the Locked or Frozen the Set Max Address command is aborted For more information see 5 9 2 Set Max security extension commands on Page 5 In CHS mode LBA High LBA Mid specify the max cylind...

Page 128: ...tains LBA bits 8 15 Mid 16 23 High which is to be set L 1 In CHS mode this register contains max cylinder number which is to be set L 0 H In LBA mode this register contains LBA bits 24 27 which is to be input L 1 In CHS mode this register is ignored L 0 L LBA mode Indicates the addressing mode L 0 specifies CHS mode and L 1 does LBA addressing mode Input Parameters From The Device LBA Low In LBA m...

Page 129: ... setting ABORT bit in status register When the address requested is greater than 268 435 455 words 103 100 shall be modified to reflect the requested value but words 61 60 shall not modified When the address requested is equal to or less than 268 435 455 words 103 100 shall be modified to reflect the requested value and words 61 60 shall also be modified If this command is not supported the maximu...

Page 130: ...r 5K160 SATA Hard Disk Drive Specification 130 167 LBA Low HOB 1 Set Max LBA 31 24 LBA Mid HOB 0 Set Max LBA 15 8 LBA Mid HOB 1 Set Max LBA 39 32 LBA High HOB 0 Set Max LBA 23 16 LBA High HOB 1 Set Max LBA 47 40 ...

Page 131: ... Set Multiple Command C6h The Set Multiple command enables the device to perform Read and Write Multiple commands and establishes the block size for these commands The block size is the number of sectors to be transferred for each interrupt The default block size after power up is 0 and Read Multiple and Write Multiple commands are disabled If an invalid block size is specified an Abort error will...

Page 132: ...rror Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 V 0 0 V Figure 79 Sleep Command E6h 99h This command is the only way to cause the device to enter Sleep Mode When this command is issued the device confirms the completion of the cached write commands Then the device is spun down and the interface becomes ...

Page 133: ...ia the device s Features Register when the S M A R T Function Set command is issued by the host 14 40 1 S M A R T Sub commands In order to select a subcommand the host must write the subcommand code to the device s Features Register before issuing the S M A R T Function Set command The subcommands and their respective codes are listed below Code Subcommand D0h S M A R T Read Attribute Values D1h S...

Page 134: ...zero value written by the host into this register before issuing the S M A R T Enable Disable Attribute Autosave subcommand will not change the current Autosave status but the device will respond with the error code specified in S M A R T Error Codes on Page 5 The S M A R T Disable Operations subcommand disables the autosave feature along with the device s S M A R T operations Upon the receipt of ...

Page 135: ...mmand is in progress The user may choose to do read scan only on specific areas of the media To do this user shall set the test spans desired in the Selective self test log and set the flags in the Feature flags field of the Selective self test log to indicate do not perform off line scan In this case the test spans defined shall be read scanned in their entirety The Selective self test log is upd...

Page 136: ...g see 7 39 7 The receipt of a S M A R T EXECUTE OFF LINE IMMEDIATE command with 0Fh Abort off line test routine in the LBA Low register shall abort Selective self test regardless of where the device is in the execution of the command If a second self test is issued while a selective self test is in progress the selective self test is aborted and the newly requested self test is executed 14 40 1 6S...

Page 137: ...ndition but involving attributes are advisory the device loads 4Fh into the LBA Mid register C2h into the LBA High register If the device detects a Threshold Exceeded Condition for prefailure attributes the device loads F4h into the LBA Mid register 2Ch into the LBA High register Advisory attributes never result in negative reliability condition 14 40 1 11 S M A R T Enable Disable Automatic Off Li...

Page 138: ...tirety using the S M A R T Read Attribute Values subcommand All multi byte fields shown in these data structures follow the ATA ATAPI 6 specification for byte ordering namely that the least significant byte occupies the lowest numbered byte address location in the field Description Bytes Offset Format Value Data Structure Revision Number 2 00h binary 0010h 1st Device Attribute 12 02h 1 2 30th Devi...

Page 139: ... 04h binary Reserved may not be 0 6 05h binary Reserved 00h 1 0Bh binary Total Bytes 12 Figure 84 Individual Attribute Data Structure Attribute ID Numbers Any non zero value in the Attribute ID Number indicates an active attribute The device supports following Attribute ID Numbers Those marked with indicate that corresponding Attribute Values can be either collected on line or off line ID Attribut...

Page 140: ...the high end for the device For Performance and Error Rate Attributes values greater than 100 are also possible up to a maximum value of 253 FDh 14 40 2 3 Off Line Data Collection Status The value of this byte defines the current status of the off line activities of the device Bit 7 indicates Automatic Off Line Data Collection Status Bit 7 Automatic Off Line Data Collection Status 0 Automatic Off ...

Page 141: ...ort off line data collection activity upon receipt of a new command 3 Off line Read Scanning implemented bit 0 The device does not support Off line Read Scanning 1 The device supports Off line Read Scanning 4 Self test implemented bit 0 Self test routine is not implemented 1 Self test routine is implemented 5 Reserved 0 6 Selective self test implemented bit 0 Selective self test routine is not imp...

Page 142: ... Value Data Structure Revision Number 2 00h binary 0010h 1st Attribute Threshold 12 02h 1 2 30th Attribute Threshold 12 15Eh 1 2 Reserved 18 16Ah 3 Vendor specific 131 17Ch 3 Data structure checksum 1 1FFh 2 512 1 See following definitions 2 Value varied by actual operating condition 3 Filled with 00h Figure 86 Device Attribute Thresholds Data Structure 14 40 3 1 Data Structure Revision Number Thi...

Page 143: ... R T Log Directory The S M A R T Log Directory is on S M A R T Log Address zero and is defined as one sector long Description Bytes Offset S M A R T Logging Version 2 00h Number of sectors in the log at log address 1 1 02h Reserved 1 03h Number of sectors in the log at log address 2 1 04h Reserved 1 05h Number of sectors in the log at log address 255 1 1FEh Reserved 1 1FFh 512 Figure 88 SMART Log ...

Page 144: ... structure 12 24h 5th error log data structure 12 30h Error data structure 30 3Ch 90 Figure 90 Error log data structure Command data structure Data format of each command data structure is shown below Description Bytes Offset Device Control register 1 00h Features register 1 01h Sector count register 1 02h LBA Low register 1 03h LBA Mid register 1 04h LBA High register 1 05h Device register 1 06h ...

Page 145: ...a structure checksum 1 1FFh 512 Note n is 0 through 20 Figure 93 Self test log data structure The data structure contains the descriptor of Self test that the device has performed Each descriptor is 24 bytes long and the self test data structure is capable to contain up to 21 descriptors After 21 descriptors has been recorded the oldest descriptor will be overwritten with new descriptor Self test ...

Page 146: ...ure 14 40 8 Error Reporting The following table shows the values returned in the Status and Error Registers when specific error conditions are encountered by a device Error Condition Status Register Error Register A S M A R T FUNCTION SET command was received by the device without the required key being loaded into the LBA High and LBA Mid registers 51h 04h A S M A R T FUNCTION SET command was rec...

Page 147: ... this command is issued the device confirms the completion of the cached write commands Then the device is spun down but the interface remains active If the device is already spun down the spin down sequence is not executed During the Standby mode the device will respond to commands but there is a delay while waiting for the spindle to reach operating speed The timer starts counting down when the ...

Page 148: ...ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 V 0 0 V Figure 975 Standby Immediate Command E0h 94h The Standby Immediate command causes the device to enter Standby mode immediately When this command is issued the device confirms the completion of the cached write commands Then the device is spun down but the interface remains active If the device is already spun down the spin d...

Page 149: ...Status See Below Error Register Status Register 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 CRC UNC 0 IDN 0 ABT T0N AM N BSY RDY DF DSC DRQ COR IDX ERR 0 0 0 0 0 V 0 0 0 V 0 0 0 V Figure 98 Write Buffer Command E8h The Write Buffer command transfers a sector of data from the host to the sector buffer of the device The sectors of data are transferred through the Data Register 16 bits at a time The Read Buffer ...

Page 150: ... one interrupt per command to indicate that data transfer has terminated and status is available If an uncorrectable error occurs the write will be terminated at the failing sector Output Parameters To The Device Sector Count The number of continuous sectors to be transferred If zero is specified then 256 sectors will be transferred LBA Low The sector number of the first sector to be transferred L...

Page 151: ...he Data Register 16 bits at a time The host initializes a slave DMA channel prior to issuing the command Data transfers are qualified by DMARQ and are performed by the slave DMA channel The device issues only one interrupt per command to indicate that data transfer has terminated and status is available If an uncorrectable error occurs the write will be terminated at the failing sector Output Para...

Page 152: ... status for this command is reported also when write caching is enabled The sectors of data are transferred through the Data Register 16 bits at a time The host initializes a slave DMA channel prior to issuing the command Data transfers are qualified by DMARQ and are performed by the slave DMA channel The device issues only one interrupt per command to indicate that data transfer has terminated an...

Page 153: ... terminated at the failing sector Output Parameters To The Device Feature Current The number of sectors to be transferred low order bit 7 0 Feature Previous The number of sectors to be transferred high order bit 15 8 T TAG value It shall be assigned to be different from all other queued commands The value shall not exceed the maximum queue depth specified by the Word 75 of the Identify Device info...

Page 154: ...ctor Count Current The number of sectors to be written to the specified log low order bits 7 0 Sector Count Previous The number of sectors to be written to the specified log high orders bits 15 8 If the number of sectors is greater than the number indicated in the Log directory which is available in Log number zero the device shall return command aborted The log transferred to the device shall be ...

Page 155: ...ters To The Device Sector Count The number of continuous sectors to be transferred The Sector Count must be set to one LBA Low The sector number of the sector to be transferred L 0 In LBA mode this register contains LBA bits 0 7 L 1 LBA High Mid The cylinder number of the sector to be transferred L 0 In LBA mode this register contains LBA bits 8 15 Mid 16 23 High L 1 H The head number of the secto...

Page 156: ...le command instead of for each sector The sectors are transferred through the Data Register 16 bits at a time Output Parameters To The Device Sector Count The number of continuous sectors to be transferred If zero is specified then 256 sectors will be transferred LBA Low The sector number of the first sector to be transferred L 0 In LBA mode this register contains LBA bits 0 7 L 1 LBA High Mid The...

Page 157: ...ice then the data is written to the disk media Command execution is identical to the Write Sector s Ext command except that an interrupt is generated for each block as defined by the Set Multiple command instead of for each sector The sectors are transferred through the Data Register 16 bits at a time Output Parameters To The Device Sector Count Current The number of continuous sectors to be trans...

Page 158: ...m the host to the device then the data is written to the disk media This command provides the same function as the Write Multiple Ext command except that the transferred data shall be written to the media before the ending status for this command is reported also when write caching is enabled Output Parameters To The Device Sector Count Current The number of continuous sectors to be transferred lo...

Page 159: ...ed at the failing sector when the auto reassign function is disable Output Parameters To The Device Sector Count The number of continuous sectors to be transferred If zero is specified then 256 sectors will be transferred LBA Low The sector number of the first sector to be transferred L 0 In LBA mode this register contains LBA bits 0 7 L 1 LBA High Mid The cylinder number of the first sector to be...

Page 160: ...xt command transfers one or more sectors from the host to the device then the data is written to the disk media The sectors are transferred through the Data Register 16 bits at a time If an uncorrectable error occurs the write will be terminated at the failing sector Output Parameters To The Device Sector Count Current The number of continuous sectors to be transferred low order bits 7 0 Sector Co...

Page 161: ... PIO SETUP FIS to the host 30 sec Data In Command Device Busy After Data Transfer In A PIO SETUP FIS is transferred to the host Status Register BSY 1 10 us Device Busy After a Register FIS to issue a command Sets proper values in the registers and sends a Register FIS Status Register BSY 1 400 ns Device Busy After Data Transfer Out Sends a Data FIS to the device Status Register BSY 1 5 us Data Out...

Page 162: ...ERASE UNIT command the execution time is referred to 7 27 Security Erase Unit F4h on Page 5 Note 2 FORMAT UNIT command the execution time is referred to 7 7 Format Unit F7h Vendor Specific on Page 5 Security Disable Password Security Erase Unit Security Set Password Security Unlock ...

Page 163: ...ommand table 58 Connector location 39 Connector locations 32 Control electronics 15 Corrosion test 25 CSA approval 38 C TICK mark 37 Cylinder allocation 17 Cylinders heads sectors by model 16 D Data In commands 66 Data Out Commands 67 Data Reliability 29 Data sheet 17 Data transfer speed 17 DC power requirements 27 Deviations from standard 44 Device Configuration Overlay 74 Device Head Register 45...

Page 164: ...on 48 H Head disk assembly data 15 Heads unload 33 Humidity 25 I Identification labels 37 Identify Device 82 Idle 91 Idle Immediate 92 L Labels Identification 37 Latency average 19 Load unload 30 M Mechanical positioning 19 Mechanical specifications 32 Mode transition time 21 Mounting hole locations 32 Mounting orientation 33 N Non data commands 67 O Operating modes description 21 Operating shock ...

Page 165: ...alibrate 114 References 12 Register initialization 48 Register set 44 Registers 44 Reliability 29 Reset response 48 S S M A R T Function 54 Safety 38 Secondary circuit protection 35 Security Disable Password 115 Security Erase Unit 117 Security Set Password 120 Security Unlock 122 Seek 123 Seek Overlap 63 Seek time average 19 full stroke 19 single track 19 Sense Condition 124 Service life 29 Set F...

Page 166: ...lstar 5K160 SATA Hard Disk Drive Specification 166 167 T Temperature 25 Time out values 161 Timings 161 Transition time 53 U UL approval 38 V Vibration 34 W Weight 32 Write Buffer 149 Write Cache function 63 ...

Page 167: ...uct names are trademarks or registered trademarks of their respective companies References in this publication to Hitachi Global Storage Technologies products programs or services do not imply that Hitachi Global Storage Technologies intends to make these available in all countries in which Hitachi Global Storage Technologies operates Product information is provided for information pur poses only ...

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