Hitachi C28W440N, Service Manual

Page: 47 / 63

47
MODE TRANSITION
This chassis automatically selects stand-by mode when switched on.(For some
special models this case is changed by software, according to the customer requests,
such that TV selects the mode which was selected when the TV is turned off, whether
directly power-off or first stand-by then power-off)
The concept IC MC44608 is designed to detect the transitions between the stand-by
and normal mode and to manage each mode in an optimal way.
In stand-by, the device monitors a pulsed mode that enables to drastically reduce the
power consumption.
The LW latch is the memory of the working status at the end of every switching
sequence. Two different cases must be considered for the logic at the termination of
the SWITCHING PHASE:
1. No Over Current was observed
2. An Over Current was observed
These two cases correspond to the two signals “NOC” in case of “No Over Current”
and “OC” in case of Over Current. The effective working status at the end of the ON
time memorised in LW corresponds to Q=1 for no over current, and Q=0 for over
current.
To enter the standby mode, secondary side is reconfigured using Q107 loop. This
starts with the micro-controller’s pin 27 becomes high; as the standby port becomes
high Q516 conducts and Q105 becomes off, then Q107 conducts and the high voltage
output value becomes lower than the NORMAL mode regulated value. The shunt
regulator IC116 is fully OFF. In the SMPS stand–by mode all the SMPS outputs are
lowered except for the low voltage output that supply the wake–up circuit located at
the isolated side of the power supply. In that mode the secondary regulation is
performed by the zener diode D123 connected in parallel to the TL431. The
secondary reconfiguration status can be detected on the SMPS primary side by
measuring the voltage level at pin8 of TR101.
In the SMPS stand–by mode the 3 distinct phases are:
The SWITCHING PHASE: Similar to the Overload mode. The current sense
clamping level is reduced. When VCC crosses the current sense section, the C.S.
clamping level depends on the power to be delivered to the load during the SMPS
stand–by mode. Every switching sequence ON/OFF is terminated by an OC as long as
the secondary Zener diode voltage has not been reached. When the Zener voltage is
reached the ON cycle is terminated by a true PWM action. The proper SWITCHING
PHASE termination must correspond to a NOC condition. The LW latch stores this
NOC status.
The LATCHED OFF PHASE: The MODE latch is set.
The START–UP PHASE is similar to the Overload Mode. The MODE latch remains
in its set status (Q=1).
The SWITCHING PHASE: The Stand–by signal is validated and the 200uA current
comes out of the Current Sense pin 2.