Connectors and switches
31/55
6.4
PCI Express M.2 bus
For the pin assignment on the PCI Express M.2 bus of the PC card CIFX
M223090AE (basic card), the information from the following table applies.
Pin Name
Description
Direction
Name
Description
Direction
Pin
GND
Ground
GND
75
74
3V3
3.3V Power
PWR
-
(not used)
73
72
3V3
3.3V Power
PWR
-
(not used)
71
70
-
(not used)
GND
Ground
GND
69
68
-
(not used)
-
(not used)
67
66
-
(not used)
-
(not used)
65
64
-
(not used)
GND
Ground
GND
63
62
-
(not used)
-
(not used)
61
60
-
(not used)
-
(not used)
59
58
-
(not used)
56
-
(not used)
GND
Ground
GND
57
54
-
(not used)
WAKE#
Wake
out
55
52
RST#
Reset
in
CLKRE
Q#
Clock request
out
53
50
-
(not used)
GND
Ground
GND
51
48
-
(not used)
CLK-
Clock (negative)
in
49
46
-
(not used)
CLK+
Clock (positive)
in
47
44
-
(not used)
GND
Ground
GND
45
42
-
SYNC0
PER0+
PC
out
43
40
-
SYNC1
PER0-
PCIE_RX_0-
out
41
38
-
(not used)
GND
Ground
GND
39
36
-
(not used)
PET0+
PC
in
37
34
-
(not used)
PET0-
PCIE_TX_0-
in
35
32
-
(not used)
GND
Ground
GND
33
30
Key E
Key E
31
28
Key E
Key E
29
26
Key E
Key E
27
24
Key E
Key E
25
22
-
(not used)
(not used)
-
23
20
-
(not used)
(not used)
-
21
18
GND
Ground
GND
(not used)
-
19
16
-
(not used)
(not used)
-
17
14
Key A
Key A
15
12
Key A
Key A
13
10
Key A
Key A
11
8
Key A
Key A
9
6
-
(not used)
GND
Ground
GND
7
4
3V3
3.3V Power
PWR
-
(not used)
5
2
3V3
3.3V Power
PWR
-
(not used)
3
GND
Ground
GND
1
Table 27: Pin assignment PCI Express M.2 bus CIFX M223090AE
CIFX M223090AE Real-Time Ethernet | Hardware description and installation
DOC190704UM02EN | Revision 2 | English | 2020-06 | Released | Public
© Hilscher 2020
