Harman Kardon MAS 101, Service Manual

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©2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
FDP20N50 / FDPF20N50 Rev. B
FDP20N50 / FDPF20N50
50
0V N-Channe
l MOSFE
T
February 2007
UniFET
TM
FDP20N50 / FDPF20N50
500V N-Channel MOSFET
Features
• 20A, 500V, R
DS(on)
= 0.23 Ω @V
GS
= 10 V
• Low gate charge ( typical 45.6 nC)
• Low C
rss
( typical 27 pF)
• Fast s witching
• 100% avalanche tested
• Improved dv/dt capability
Description
These N- Channel enhancement mode power field ef fect
transistors are p roduced using Fairchild’ s pr oprietary, pla nar
stripe, DMOS technology.
This advanced techn ology has been especially tailored to
minimize on-st ate resistance, pr ovide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies and active power factor
correction.
Absolute Maximum Ratings
Thermal Characteristics
TO-220
FDP Series
G S D
TO-220F
FDPF Series
G S
D
D
G
S
Symbol Parameter FDP20N50 FDPF20N50 Unit
V
DSS
Drain-Source Voltage 500 V
I
D
Drain Current - Continuous (T
C
= 25 ° C)
- Continuous (T
C
= 100 ° C)
20
12.9
20 *
12.9
*
A
A
I
DM
Drain Current - Pulsed
(Note 1)
80 80
*
A
V
GSS
Gate-Source voltage ± 30 V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
1110 mJ
I
AR
Avalanche Current
(Note 1)
20 A
E
AR
Repetitive Avalanche Energy
(Note 1)
25 mJ
dv/dt Peak Diode Recovery dv/dt
(Note 3)
4.5 V/ns
P
D
Power Dissipation (T
C
= 25 ° C)
- Derate above 25 ° C
250
2.0
62
0.5
W
W/ ° C
T
J,
T
STG
Operating and Storage Temperature Range -55 to +150 ° C
T
L
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
300 ° C
Symbol Parameter FDP20N50 FDPF20N50 Unit
R
θ JC
Thermal Resistance, Junction-to-Case 0.5 2.0 ° C/W
R
θ CS
Thermal Resistance, Case-to-Sink Typ. 0.5 -- ° C/W
R
θ JA
Thermal Resistance, Junction-to-Ambient 62.5 62.5 ° C/W
* Drain current limited by maximum junction temperature
2 9